US2020395272A1PendingUtilityA1

Semiconductor device and method of manufacturing a semiconductor device

Assignee: AMKOR TECH SINGAPORE HOLDING PTE LTDPriority: Jun 11, 2019Filed: Jun 11, 2019Published: Dec 17, 2020
Est. expiryJun 11, 2039(~12.9 yrs left)· nominal 20-yr term from priority
H10W 72/551H10W 74/00H10W 72/0198H10W 90/756H10W 90/754H10W 72/30H10W 72/073H10W 72/07236H10W 72/07231H10W 72/072H10W 72/241H10W 72/07232H10W 72/07227H10W 72/354H10W 72/353H10W 72/351H10W 72/325H10W 72/247H10W 72/244H10W 72/07254H10W 90/726H10W 90/724H10W 72/252H10W 72/222H10P 54/00H10W 74/016H10W 72/013H10W 70/479H10W 70/457H10W 70/424H10W 70/417H10W 20/20H10W 74/114H10W 74/014H10P 72/7424H10W 74/01H10W 95/00H10W 70/05H10P 72/74H10W 70/65H01L 23/481H01L 24/96H01L 23/49513H01L 23/315H01L 21/565H01L 21/561
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Claims

Abstract

A semiconductor device comprises a substrate having a substrate top side, a substrate lateral side, and a substrate bottom side, an electronic device on the substrate top side, and an encapsulant on the substrate top side and contacting a lateral surface of the electronic device. The substrate comprises a conductive structure and a dielectric structure that extends comprising a protrusion in contact with the encapsulant. The conductive structure comprises a lead comprising a lead flank, the lead flank comprising a cavity and a conductive coating on a surface of the lead in the cavity. The conductive structure comprises a pad exposed at the substrate top side, embedded in the dielectric structure, and adjacent to the protrusion, to electrically couple with the electronic device via a first internal interconnect. Other examples and related methods are also disclosed herein.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising:
 a substrate having a substrate top side, a substrate lateral side, and a substrate bottom side;   an electronic device on the substrate top side; and   an encapsulant on the substrate top side and contacting a lateral surface of the electronic device;   wherein the substrate comprises a conductive structure and a dielectric structure comprising a protrusion in contact with the encapsulant;   wherein the conductive structure comprises a lead comprising a lead flank, the lead flank comprising a cavity and a conductive coating on a surface of the lead flank in the cavity; and   wherein the conductive structure comprises a pad exposed at the substrate top side, embedded in the dielectric structure, and adjacent to the protrusion, to electrically couple with the electronic device via a first internal interconnect.   
     
     
         2 . The semiconductor device of  claim 1 , wherein:
 the conductive structure comprises a paddle; and   a second internal interconnect extends from a bottom side of the electronic device and couples to the paddle.   
     
     
         3 . The semiconductor device of  claim 1 , wherein the dielectric structure comprises a dielectric layer that extends from the substrate bottom side to the substrate top side. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the cavity of the lead flank is dimple-shaped. 
     
     
         5 . The semiconductor device of  claim 1 , wherein:
 the substrate comprises:
 a substrate first interior side perpendicular to the substrate lateral side; and 
 a substrate second interior side perpendicular to the substrate bottom side; 
   the substrate first interior side comprises a first interior surface of the dielectric structure, and a first coating surface of the conductive coating;   the substrate second interior side comprises a second interior surface of the dielectric structure, and a second coating surface of the conductive coating; and   the substrate first interior side is perpendicular to the substrate second interior side.   
     
     
         6 . The semiconductor device of  claim 1 , wherein the protrusion bounds a lateral surface of the pad and extends into the encapsulant. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the lead flank is electrically coupled to a circuit pattern of an external device via solder that fills the cavity, covers a majority of a height of the lead, and is visible via a visual inspection. 
     
     
         8 . The semiconductor device of  claim 1 , wherein:
 the dielectric structure comprises a first molding material layer; and   
       the encapsulant comprises a second molding material layer in contact with the first material layer. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the cavity comprises:
 a first lead surface of the lead;   a second lead surface of the lead, perpendicular to the first lead surface;   a first jamb surface of the dielectric structure, perpendicular to the first lead surface and the second lead surface; and   a second jamb surface of the dielectric structure, perpendicular to the first lead surface and the second lead surface, and opposite the first jamb surface across the cavity.   
     
     
         10 - 20 . (canceled) 
     
     
         21 . A semiconductor device, comprising:
 a conductive structure, wherein the conductive structure comprises a pad and a lead;   a dielectric structure contacting the conductive structure, wherein the dielectric structure is adjacent to the pad and the lead, wherein a surface of the lead is depressed relative to a surface of the dielectric structure;   a cavity in the lead adjacent to the dielectric structure; and   a plating layer on the lead, including on a surface of the lead in the cavity, the plating layer in the cavity defining a wettable flank of the lead;   wherein a protrusion of the dielectric structure protrudes beyond a surface of the pad.   
     
     
         22 . The semiconductor device of  claim 21 , wherein the conductive structure further comprises a paddle, and further comprising:
 an electronic device adjacent to the conductive structure and electrically coupled with the paddle or the pad; and   an encapsulant contacting the conductive structure and contacting a lateral surface of the electronic device;   wherein a protrusion of the dielectric structure extends into the encapsulant.   
     
     
         23 . The semiconductor device of  claim 21 , wherein the pad is between protrusions of the dielectric structure. 
     
     
         24 . The semiconductor device of  claim 21 , wherein the conductive structure further comprises a paddle between the dielectric structure and another dielectric structure. 
     
     
         25 . The semiconductor device of  claim 24 , further comprising a coating on a surface of the paddle. 
     
     
         26 . The semiconductor device of  claim 21 , wherein:
 the lead comprises a lead base on the conductive structure; and   a lead body on the lead base, wherein the lead base is wider than the lead body.   
     
     
         27 . A semiconductor device, comprising:
 a dielectric structure in a conductive structure, wherein the dielectric structure comprises a protrusion and the conductive structure comprises a pad bounded by the protrusion;   a lead in the conductive structure adjacent to the dielectric structure and comprising a cavity; and   a plating on the conductive structure covering the lead including covering a surface of the lead in the cavity, wherein the plating and the cavity define a wettable flank of the lead.   
     
     
         28 . The semiconductor device of  claim 27 , further comprising:
 an electronic device attached to the conductive structure, wherein the electronic device is coupled with the pad via an internal interconnect; and   a molding compound contacting the conductive structure, wherein the molding compound contacts a side surface of the electronic device, and wherein the protrusion of the dielectric structure extends into the molding compound.   
     
     
         29 . The semiconductor device of  claim 27 , wherein the cavity comprises a first cavity surface perpendicular to a second cavity surface. 
     
     
         30 . The semiconductor device of  claim 27 , wherein the cavity comprises forming a dimple-shaped cavity surface. 
     
     
         31 . The semiconductor device of  claim 27 , wherein:
 the protrusion protrudes higher than a surface of the pad; and   a portion of the internal interconnect is bounded by the protrusion.

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