Semiconductor device, electronic component, and electronic device

Abstract

Power consumption is reduced. A semiconductor device includes an arithmetic processing circuit, a power supply circuit, a power management unit (PMU), and a power switch. The arithmetic processing circuit includes a storage circuit retaining generated data. The storage circuit includes a backup circuit including a transistor and a capacitor. When a control signal for transition to a resting state is input from the arithmetic processing circuit, the PMU performs voltage scaling operation for lowering a power supply potential of the arithmetic processing circuit. When the period of the resting state exceeds the set time, the PMU performs power gating operation for stopping power supply to the arithmetic processing circuit. Data saving operation of the storage circuit is performed before the voltage scaling operation.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a power supply circuit;   a power management unit; and   an arithmetic processing circuit comprising a first circuit and a second circuit,   wherein the power supply circuit is configured to supply power to the arithmetic processing circuit,   wherein the power management unit is configured to control power supply to the arithmetic processing circuit,   wherein the first circuit is configured to retain first data in a period during which power is supplied to the arithmetic processing circuit,   wherein the second circuit is configured to retain the first data in a period during which power supply to the arithmetic processing circuit is stopped,   wherein the semiconductor device is configured to write the first data to the second circuit in the period during which power is supplied to the arithmetic processing circuit,   wherein the semiconductor device is configured to stop power supply to the arithmetic processing circuit,   wherein the semiconductor device is configured to restart power supply to the arithmetic processing circuit, and   wherein the semiconductor device is configured to write the first data retained in the second circuit to the first circuit.   
     
     
         2 . A semiconductor device comprising:
 a power supply circuit;   a power management unit;   an arithmetic processing circuit comprising a first circuit and a second circuit; and   a power switch,   wherein the power supply circuit is capable of generating a power supply potential,   wherein the power switch is capable of controlling supply of the power supply potential to the arithmetic processing circuit,   wherein the first circuit is capable of retaining data generated in the arithmetic processing circuit,   wherein the second circuit is capable of saving and retaining the data retained in the first circuit and is capable of restoring the saved data to the first circuit, and   wherein the power management unit is capable of:
 controlling operation of saving data from the first circuit to the second circuit; 
 controlling operation of restoring data from the second circuit to the first circuit; 
 controlling operation of the power switch; and 
 controlling a magnitude of the power supply potential. 
   
     
     
         3 . A semiconductor device comprising:
 a power supply circuit;   a power management unit comprising a third circuit;   an arithmetic processing circuit comprising a first circuit and a second circuit; and   a power switch,   wherein the power supply circuit is capable of generating a first power supply potential and a second power supply potential,   wherein the power switch is capable of controlling supply of a power supply potential to the arithmetic processing circuit,   wherein the first circuit is capable of retaining data generated in the arithmetic processing circuit,   wherein the second circuit is capable of saving and retaining the data retained in the first circuit and is capable of restoring the saved data to the first circuit,   wherein the power management unit is capable of controlling the power supply circuit and the power switch,   wherein the first power supply potential is supplied in a first mode of the power management unit,   wherein the second power supply potential is supplied in a second mode of the power management unit,   wherein supply of the first power supply potential and the second power supply potential is stopped in a third mode of the power management unit, and   wherein the power management unit is capable of:
 transferring from the first mode to the second mode in response to a first signal generated in the arithmetic processing circuit; 
 controlling operation of saving data from the first circuit to the second circuit in response to the first signal; 
 transferring from the second mode to the third mode in response to a second signal generated in the third circuit; 
 transferring from the third mode to the first mode in response to a third signal; and 
 controlling operation of restoring data from the second circuit to the first circuit in response to the third signal. 
   
     
     
         4 . The semiconductor device according to  claim 1 ,
 wherein the first circuit is a flip-flop circuit.   
     
     
         5 . The semiconductor device according to  claim 1 ,
 wherein the second circuit comprises a first transistor and a capacitor,   wherein one of a source and a drain of the first transistor is electrically connected to the capacitor,   wherein the first transistor is controlled by the power management unit, and   wherein a channel formation region of the first transistor comprises an oxide semiconductor.   
     
     
         6 . An electronic component comprising:
 the semiconductor device according to  claim 1 ; and   a lead.   
     
     
         7 . An electronic device comprising:
 the semiconductor device according to  claim 1 ; and   at least one of a display device, a touch panel, a microphone, a speaker, and a housing.   
     
     
         8 . The semiconductor device according to  claim 2 ,
 wherein the first circuit is a flip-flop circuit.   
     
     
         9 . The semiconductor device according to  claim 2 ,
 wherein the second circuit comprises a first transistor and a capacitor,   wherein one of a source and a drain of the first transistor is electrically connected to the capacitor,   wherein the first transistor is controlled by the power management unit, and   wherein a channel formation region of the first transistor comprises an oxide semiconductor.   
     
     
         10 . An electronic component comprising:
 the semiconductor device according to  claim 2 ; and   a lead.   
     
     
         11 . An electronic device comprising:
 the semiconductor device according to  claim 2 ; and   at least one of a display device, a touch panel, a microphone, a speaker, and a housing.   
     
     
         12 . The semiconductor device according to  claim 3 ,
 wherein the first circuit is a flip-flop circuit.   
     
     
         13 . The semiconductor device according to  claim 3 ,
 wherein the second circuit comprises a first transistor and a capacitor,   wherein one of a source and a drain of the first transistor is electrically connected to the capacitor,   wherein the first transistor is controlled by the power management unit, and   wherein a channel formation region of the first transistor comprises an oxide semiconductor.   
     
     
         14 . An electronic component comprising:
 the semiconductor device according to  claim 3 ; and   a lead.   
     
     
         15 . An electronic device comprising:
 the semiconductor device according to  claim 3 ; and   at least one of a display device, a touch panel, a microphone, a speaker, and a housing.