Thin film transistor, method of manufacturing the same and display device

Abstract

Embodiments of the present disclosure provide a thin film transistor, a method of manufacturing the same, and a display device. The thin film transistor includes a metal conductive pattern layer, an interlayer insulating layer, and a metal oxide layer; and the metal conductive pattern layer includes: a light shielding pattern, a source signal line, and/or a drain signal line; the metal oxide layer includes: a source electrode, a drain electrode, and an active layer. An orthographic projection of the active layer on the base substrate has an overlapping region with that of the light shielding pattern; the source electrode extends through the interlayer insulating layer to connect to the source signal line, and/or the drain electrode extends through the interlayer insulating layer to connect to the drain signal line.

1 . A thin film transistor, comprising: a metal conductive pattern layer disposed on a base substrate; and an interlayer insulating layer, a metal oxide layer, a gate insulating layer, and a gate electrode, which are sequentially disposed on the base substrate having the metal conductive pattern layer;
 wherein the metal conductive pattern layer includes: a light shielding pattern, a source signal line, and/or a drain signal line;   the metal oxide layer includes a source electrode, a drain electrode, and an active layer between the source electrode and the drain electrode and being in direct contact with the source electrode and the drain electrode;   an orthographic projection of the active layer on the base substrate has an overlapping region with an orthographic projection of the light shielding pattern on the base substrate; and   the source electrode extends through the interlayer insulating layer to connect to the source signal line, and/or the drain electrode extends through the interlayer insulating layer to connect to the drain signal line.   
     
     
         2 . The thin film transistor as claimed in  claim 1 , wherein the orthographic projection of the light shielding pattern on the base substrate covers the orthographic projection of the active layer on the base substrate. 
     
     
         3 . The thin film transistor as claimed in  claim 1 , wherein the light shielding pattern is connected to the source signal line; or
 the light shielding pattern is connected to the drain signal line.   
     
     
         4 . The thin film transistor as claimed in  claim 1 , wherein the active layer is made of a metal oxide constituting the metal oxide layer, and the source electrode and the drain electrode include a metal that is transformed from the metal oxide by a conductor transforming process. 
     
     
         5 . An array substrate comprising the thin film transistor as claimed in  claim 1 . 
     
     
         6 . The array substrate as claimed in  claim 5 , wherein the array substrate is an OLED array substrate; and a sub-pixel of the array substrate includes a pixel driving circuit;
 wherein the pixel driving circuit includes: a driving transistor, and an organic light emitting diode connected to a source electrode of the driving transistor; and   wherein the driving transistor is the thin film transistor, and a drain electrode of the driving transistor is connected to the drain signal line, and the source electrode of the driving transistor is connected to a first electrode of the organic light emitting diode.   
     
     
         7 . The array substrate as claimed in  claim 6 , wherein the pixel driving circuit further comprises a first switching transistor, a second switching transistor, and a storage capacitor;
 a drain electrode of the first switching transistor is connected to the data line, a source electrode of the first switching transistor is connected to the gate electrode of the driving transistor, and the gate electrode of the first switching transistor is connected to a first gate line;   a gate electrode of the second switching transistor is connected to a second gate line, a source electrode of the second switching transistor is connected to a sensing signal line, and a drain electrode of the second switching transistor is connected to the source electrode of the driving transistor;   one end of the storage capacitor is connected to the gate electrode of the driving transistor, and the other end is connected to the source electrode of the driving transistor;   the source electrode, the drain electrode, and the active layer of the first switching transistor and the source electrode, the drain electrode, and the active layer of the second switching transistor are respectively made of a same material and located in a same layer as the source electrode, the drain electrode, and the active layer of the driving transistor; and   the gate electrode of the first switching transistor and the gate electrode of the second switching transistor are both made of a same material and located in a same layer as the gate electrode of the driving transistor.   
     
     
         8 . The array substrate as claimed in  claim 7 , wherein
 the first electrode is a transparent electrode; and   the source electrode of the first switching transistor is connected to the gate electrode of the driving transistor through a connection portion, and the connection portion is made of a same material and located in a same layer as the first electrode.   
     
     
         9 . The array substrate as claimed in  claim 8 , wherein
 the source electrode of the driving transistor is connected to the light shielding pattern through the source signal line;   the source electrode of the driving transistor and the drain electrode of the second switching transistor constitute an integral electrode, and the integral electrode is connected to the first electrode; and   the connection portion extends to a position facing the integral electrode to form the storage capacitor with the integral electrode.   
     
     
         10 . The array substrate as claimed in  claim 7 , wherein
 the data line is located in a same layer and made of a same material as the light shielding pattern of the driving transistor; and/or   the first gate line, the second gate line, and the sensing signal line are located in a same layer and made of a same material as the gate electrode of the driving transistor.   
     
     
         11 . A display device comprising the array substrate according to  claim 5 . 
     
     
         12 . A method of manufacturing a thin film transistor, wherein the method comprises:
 forming a metal conductive pattern layer on a base substrate by a patterning process, the metal conductive pattern layer comprising: a light shielding pattern, a source signal line to be connected to a source electrode of the thin film transistor, and/or a drain signal line to be connected to a drain electrode of the thin film transistor;   forming an interlayer insulating layer on the base substrate on which the metal conductive pattern layer is formed;   forming a metal oxide layer on the base substrate on which the interlayer insulating layer is formed; wherein the metal oxide layer includes a source electrode region, a drain electrode region, and an active region between the source electrode region and the drain electrode region and being in direct contact with the source electrode region and the drain electrode region, wherein a portion of the metal oxide layer located in the source electrode region penetrates through the interlayer insulating layer to connect to the source signal line and/or a portion of the metal oxide layer located in the drain electrode region penetrates through the interlayer insulating layer to connect to the drain signal line, and an orthographic projection, on the base substrate, of a portion of the metal oxide layer located in the active region has an overlapping region with an orthographic projection of the light shielding pattern on the base substrate;   forming the gate insulating layer and the gate electrode in sequence at a location, corresponding to the active region, of the metal oxide layer;   performing a conductor transforming process by a plasma treatment to the source electrode region and the drain electrode region of the metal oxide layer on the base substrate on which the gate electrode is formed, such that a portion, corresponding to the source electrode region, of the metal oxide layer constitutes the source electrode, and a portion, corresponding to the drain electrode region, of the metal oxide layer constitutes the drain electrode, and the active region of the metal oxide layer constitutes the active layer.