Methods, Structures, and Designs for Self-Aligning Local Interconnects Used in Integrated Circuits

Abstract

An integrated circuit includes a gate electrode level region that includes a plurality of linear-shaped conductive structures. Each of the plurality of linear-shaped conductive structures is defined to extend lengthwise in a first direction. Some of the plurality of linear-shaped conductive structures form one or more gate electrodes of corresponding transistor devices. A local interconnect conductive structure is formed between two of the plurality of linear-shaped conductive structures so as to extend in the first direction along the two of the plurality of linear-shaped conductive structures.

What is claimed is: 
     
         1 . An integrated circuit, comprising:
 a local interconnect conductive structure including a first portion and a second portion, the first portion of the local interconnect conductive structure having a substantially rectangular shape with a length measured in a first direction and a width measured in a second direction, the second portion of the local interconnect conductive structure having a substantially rectangular shape with a length measured in the second direction and a width measured in the first direction, the second portion of the local interconnect conductive structure integrally formed with the first portion of the local interconnect conductive structure;   a gate electrode structure having a substantially rectangular shape with a length measured in the second direction and an width measured in the first direction; and   a silicide layer formed across a portion of a top surface of the gate electrode structure, wherein the first portion of the local interconnect conductive structure physically contacts the silicide layer.   
     
     
         2 . The integrated circuit as recited in  claim 1 , further comprising:
 a first dielectric side spacer formed along a first side of the gate electrode structure, the first portion of the local interconnect conductive structure extending over the dielectric side spacer to physically contact the silicide layer.   
     
     
         3 . The integrated circuit as recited in  claim 2 , further comprising:
 a second dielectric side spacer formed along a second side of the gate electrode structure.   
     
     
         4 . The integrated circuit as recited in  claim 1 , wherein a material composition of the local interconnect conductive structure includes nickel. 
     
     
         5 . The integrated circuit as recited in  claim 1 , wherein a material composition of the local interconnect conductive structure includes platinum. 
     
     
         6 . The integrated circuit as recited in  claim 1 , wherein a material composition of the local interconnect conductive structure includes a combination of nickel and platinum. 
     
     
         7 . The integrated circuit as recited in  claim 1 , wherein a material composition of the local interconnect conductive structure includes titanium. 
     
     
         8 . The integrated circuit as recited in  claim 1 , wherein a material composition of the local interconnect conductive structure includes cobalt. 
     
     
         9 . The integrated circuit as recited in  claim 1 , wherein the silicide layer is formed by a material of the local interconnect conductive structure and a material of the gate electrode structure. 
     
     
         10 . The integrated circuit as recited in  claim 9 , wherein a portion of the gate electrode structure closest to the silicide layer is formed of polysilicon. 
     
     
         11 . The integrated circuit as recited in  claim 1 , wherein the length of the first portion of the local interconnect conductive structure is greater than the width of the second portion of the local interconnect conductive structure, and wherein the length of the second portion of the local interconnect conductive structure is greater than the width of the first portion of the local interconnect conductive structure. 
     
     
         12 . The integrated circuit as recited in  claim 1 , wherein the gate electrode structure is a first gate electrode structure, the integrated circuit further including a second gate electrode structure and a third gate electrode structure, both the second gate electrode structure and the third gate electrode structure positioned next to the first gate electrode structure. 
     
     
         13 . The integrated circuit as recited in  claim 12 , wherein the second gate electrode structure has a substantially rectangular shape with a length measured in the second direction and a width measured in the first direction, and
 wherein the third gate electrode structure has a substantially rectangular shape with a length measured in the second direction and a width measured in the first direction.   
     
     
         14 . The integrated circuit as recited in  claim 13 , wherein the second gate electrode structure and the third gate electrode structure are co-aligned such that a lengthwise-oriented centerline of the second gate electrode structure is substantially aligned with a lengthwise-oriented centerline of the third gate electrode structure. 
     
     
         15 . The integrated circuit as recited in  claim 14 , wherein the second gate electrode structure is spaced apart from the third gate electrode structure such that the first portion of the local interconnect conductive structure extends between the second gate electrode structure and the third gate electrode structure. 
     
     
         16 . The integrated circuit as recited in  claim 15 , wherein the first portion of the local interconnect conductive structure does not contact either the second gate electrode structure or the third gate electrode structure. 
     
     
         17 . The integrated circuit as recited in  claim 16 , further comprising:
 a first diffusion region of a first diffusion type, wherein the second portion of the local interconnect conductive structure physically contacts the first diffusion region of the first diffusion type.   
     
     
         18 . The integrated circuit as recited in  claim 17 , further comprising:
 a first diffusion region of a second diffusion type, wherein the second portion of the local interconnect conductive structure physically contacts the first diffusion region of the second diffusion type.   
     
     
         19 . The integrated circuit as recited in  claim 18 , further comprising:
 a fourth gate electrode structure, wherein a first portion of the fourth gate electrode structure and the first diffusion region of the first diffusion type form parts of a transistor of a first transistor type.   
     
     
         20 . The integrated circuit as recited in  claim 19 , wherein a second portion of the fourth gate electrode structure and the first diffusion region of the second diffusion type form parts of a transistor of a second transistor type. 
     
     
         21 . The integrated circuit as recited in  claim 20 , further comprising:
 a second diffusion region of the first diffusion type forming part of the first transistor of the first transistor type; and   a second diffusion region of the second diffusion type forming part of the first transistor of the second transistor type.   
     
     
         22 . The integrated circuit as recited in  claim 21 , further comprising:
 a contact structure formed to physically connect with the fourth gate electrode structure; and   an interconnect level conductive structure formed to physically connect with the contact structure.