Storage device and operating method thereof

Abstract

A storage device for performing a read operation together with a program operation includes a memory device for storing data and a memory controller for controlling the memory device. The memory device includes an allow bit setting register for storing allow bits which are compared with fail bits included in read data read in a read operation and includes a read operation controller for controlling the memory device to immediately perform the read operation after a program operation. The memory controller includes a command generator for generating a command instructing the memory device to perform an operation, includes a bad block processor for setting a bad block, based on a result of the read operation performed by the memory device, and includes a fail information controller for setting an operation mode of a next read operation, based on the result of the read operation performed by the memory device.

What is claimed is: 
     
         1 . A storage device comprising a memory device for storing data and a memory controller for controlling the memory device,
 wherein the memory device comprises:   an allow bit setting register configured to store allow bits which are compared with fail bits included in read data read in a read operation; and   a read operation controller configured to control the memory device to immediately perform the read operation after a program operation, and   wherein the memory controller comprises:   a command generator configured to generate a command instructing the memory device to perform an operation;   a bad block processor configured to set a bad block, based on a result of the read operation performed by the memory device; and   a fail information controller configured to set an operation mode of a next read operation, based on the result of the read operation performed by the memory device.   
     
     
         2 . The storage device of  claim 1 , wherein the command generator generates a program direct read command instructing the memory device to determine a passing or failure of the program operation by reading data programmed in the memory device when a program verify operation passes after the memory device performs the program operation. 
     
     
         3 . The storage device of  claim 2 , wherein, when the program verify operation passes when the memory device performs an operation corresponding to the program direct read command, the read operation controller controls the memory device to read the programmed data. 
     
     
         4 . The storage device of  claim 2 , wherein the memory device compares a number of the fail bits included the read data, obtained by reading the programmed data, with the number of allow bits, and outputs program pass information or program fail information, based on a comparison result. 
     
     
         5 . The storage device of  claim 4 , wherein the memory device:
 outputs the program fail information, when the number of fail bits exceeds the number of allow bits; and   outputs the program pass information, when the number of fail bits does not exceed the number of allow bits.   
     
     
         6 . The storage device of  claim 4 , wherein the bad block processor processes as a bad block, based on the program fail information, a memory block including a memory cell on which the program operation was performed. 
     
     
         7 . The storage device of  claim 6 , wherein the bad block processor generates bad block information on the memory block processed as the bad block. 
     
     
         8 . The storage device of  claim 7 , wherein the command generator generates a reprogram command for allowing the program operation to be re-performed on a different memory block from the memory block processed as the bad block. 
     
     
         9 . The storage device of  claim 4 , wherein the fail information controller includes:
 a fail information counter configured to generate a count value by counting a number of times the program fail information is received;   an allow bit setting component configured to output an allow bit setting command for changing allow bits stored in the allow bit setting register, based on the count value;   a sensing circuit selector configured to output sensing circuit selection information for selecting a circuit by which a sensing operation is performed, based on the count value; and   a read operation setting component configured to output read operation setting information for determining a page to be read or changing a read voltage, based on the count value.   
     
     
         10 . The storage device of  claim 9 , wherein, when the count value exceeds a reference value, the fail information counter outputs the count value to at least one of the allow bit setting component, the sensing circuit selector, and the read operation setting component. 
     
     
         11 . The storage device of  claim 10 , wherein, when the fail information counter outputs the count value to the allow bit setting component, the allow bit setting component outputs the allow bit setting command for changing the number of allow bits to be greater than the existing number of bits. 
     
     
         12 . The storage device of  claim 10 , wherein, when the fail information counter outputs the count value to the sensing circuit selector, the sensing circuit selector outputs the sensing circuit selection information for allowing a sensing operation to be performed by a current sensing circuit. 
     
     
         13 . A method for operating a storage device including a memory device for storing data and a memory controller for controlling the memory device, the method comprising:
 performing, by the memory device, a program verify operation after a program operation;   reading data programmed in the memory device, when the program verify operation passes;   determining, by the memory device, a passing or failure of the program operation, based on read data obtained by reading the data programmed in the memory device; and   outputting, by the memory device, program pass information or program fail information to the memory controller, based on the determined passing or failure, respectively, result of the program operation.   
     
     
         14 . The method of  claim 13 , wherein reading data programmed in the memory device comprises immediately performing a read operation without outputting, to the memory controller, a response representing that the program verify operation has passed. 
     
     
         15 . The method of  claim 13 , wherein determining a passing or failure of the program operation comprises comparing a number of fail bits included in the read data with a number of allow bits stored in the memory device. 
     
     
         16 . The method of  claim 15 , wherein outputting program pass information or program fail information to the memory controller comprises:
 outputting the program fail information to the memory controller when the number of fail bits exceeds the number of allow bits; and   outputting the program pass information to the memory controller when the number of fail bits does not exceed the number of allow bits.   
     
     
         17 . The method of  claim 13 , further comprising processing as a bad block, based on the program fail information, a memory block including a memory cell on which the program operation was performed. 
     
     
         18 . The method of  claim 17 , further comprising re-performing the program operation on a different memory block from the memory block processed as the bad block. 
     
     
         19 . The method of  claim 13 , further comprising:
 generating a count value by counting a number of times the program fail information is received; and   setting an operation mode, based on the count value, for reading data programmed in the memory device after the program verify operation passes.   
     
     
         20 . The method of  claim 19 , wherein setting an operation mode comprises changing, when the count value exceeds a reference value, the number of allow bits stored in the memory device based on the count value.