Modulation agnostic digital hybrid mode power amplifier system and method

Abstract

A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available.

1 - 2 . (canceled) 
     
     
         3 . A digital predistortion system comprising:
 an input signal;   at least one power amplifier configured to output an amplified signal;   at least one feedback signal derived from the amplified signal including a representation of a noise characteristic of the at least one power amplifier;   estimator logic responsive to the at least one feedback signal and configured to generate predistortion coefficients based at least in part on a feedback path delay determined from a correlation based at least on a summation including transmission data, and feedback data, wherein the delay is determined by maximizing the correlation and   digital predistortion logic configured to predistort the input signal and further configured to supply a predistorted signal to the at least one power amplifier, wherein the digital predistortion logic is based at least on a predistortion summation function that sums the predistortion coefficients determined by the estimator logic.   
     
     
         4 . The digital predistortion system of  claim 3 , configured for base station applications further comprising a digital field programmable gate array that includes one or more of a digital up-converter, a crest factor reduction, a predistorter, or a digital quadrature modulator. 
     
     
         5 . The digital predistortion system of  claim 3 , configured for repeater applications further comprising a digital field programmable gate array that includes at least one of a digital quadrature demodulator, a crest factor reduction, a predistorter, or a digital quadrature modulator. 
     
     
         6 . The digital predistortion system of  claim 3 , further comprising a digital field programmable gate array configured to provide predistortion that compensates adaptively for both nonlinearity and memory effects by generating asymmetric distortion of the power amplifier. 
     
     
         7 . The digital predistortion system of  claim 3 , further comprising a digital field programmable gate array that includes an adaptation algorithm configured to determine the optimum gate bias voltage of the power amplifier for stabilizing the linearity fluctuations due to the temperature changes of the power amplifier. 
     
     
         8 . The digital predistortion system of  claim 3 , wherein the at least one power amplifier uses at least one of the following efficiency boosting techniques: Doherty, Envelope Elimination and Restoration, Envelope Tracking, Envelope Following, or Linear amplification using Nonlinear Components in order to maximize the efficiency of the power amplifier system. 
     
     
         9 . A digital predistortion method comprising:
 receiving an input signal,   amplifying the input signal using at least one power amplifier,   deriving at least one feedback signal from the amplified signal including a representation of a noise characteristic of the at least one power amplifier,   generating predistortion coefficients using estimator logic responsive to the at least one feedback signal based at least in part on a feedback path delay determined from a correlation based at least on a summation including transmission data and feedback data, wherein a delay by maximizing the correlation; and   predistorting the input signal and supplying a predistorted signal to the at least one power amplifier, wherein the predistorting logic is based at least on a predistortion summation function that sums the predistortion coefficients determined by the estimator logic.   
     
     
         10 . The digital predistortion method of  claim 9 , further comprising providing predistortion that compensates adaptively for both nonlinearity and memory effects by generating asymmetric distortion of the power amplifier using a digital field programmable gate array. 
     
     
         11 . The digital predistortion method of  claim 9 , further comprising determining an gate bias voltage of the power amplifier for stabilizing the linearity fluctuations due to the temperature changes of the power amplifier using an adaptation algorithm of a digital field programmable gate array. 
     
     
         12 . The digital predistortion method of  claim 9 , wherein the at least one power amplifier uses at least one of the following efficiency boosting techniques: Doherty, Envelope Elimination and Restoration, Envelope Tracking, Envelope Following, or Linear amplification using Nonlinear Components in order to maximize the efficiency of the power amplifier system. 
     
     
         13 . The digital predistortion method of  claim 9 , configured for base station applications further comprising digitally upconverting the input signal, reducing crest factor of the input signal, predistorting the input signal, or modulating the input signal. 
     
     
         14 . The digital predistortion method of  claim 9 , configured for repeater applications further comprising demodulating the input signal, reducing crest factor of the input signal, predistorting the input signal, or modulating the input signal.