US2020350271A1PendingUtilityA1

Bonded semiconductor package and related methods

Assignee: SEMICONDUCTOR COMPONENTS IND LLCPriority: Oct 5, 2016Filed: Jul 15, 2020Published: Nov 5, 2020
Est. expiryOct 5, 2036(~10.2 yrs left)· nominal 20-yr term from priority
H10W 74/15H10W 72/07254H10W 72/07253H10W 72/07232H10W 72/07227H10W 72/01255H10W 72/01235H10W 72/354H10W 72/248H10W 72/244H10W 72/241H10W 72/234H10W 72/232H10W 72/222H10W 72/221H10W 72/0198H10W 72/073H10W 72/072H10W 74/131H10W 70/60H10W 99/00H10W 72/252H10W 72/20H01L 2224/83191H01L 2224/13082H01L 24/13H01L 24/17H01L 2224/13013H01L 2224/2919H01L 2224/16105H01L 2224/81193H01L 2224/81141H01L 2224/13017H01L 2224/83193H01L 24/25H01L 2224/11472H01L 2224/13012H01L 2224/94H01L 2224/14131H01L 2224/13019H01L 24/16H01L 2224/81203H01L 2224/1607H01L 23/3157H01L 2224/73104H01L 24/11H01L 2224/13015H01L 2224/16056H01L 24/81H01L 2224/13005H01L 24/94H01L 2224/11462
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Claims

Abstract

Implementations of a semiconductor package may include: a first wafer having a first surface and a first set of blade interconnects, the first set of blade interconnects extending from the first surface. The package may include a second wafer having a first surface and a second set of blade interconnects, the second set of blade interconnects extending from the first surface and oriented substantially perpendicularly to a direction of orientation of the first set of blade interconnects. The first set of blade interconnects may be hybrid bonded to the second set of blade interconnects at a plurality of points of intersection between the first and second set of blade interconnects. The plurality of points of intersection may be located along a length of each blade interconnect of the first set of blade interconnects, and along the length of each blade interconnect of the second set of blade interconnects.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of forming a blade interconnect, comprising:
 forming an undercut pattern in a layer on a first surface of a first wafer, where the undercut pattern, when viewed from above the first surface, comprises one of two opposing triangles in the layer or an hourglass shape in the layer;   electroplating a metal into the undercut pattern to form a blade interconnect; and   forming a chamfer in the blade interconnect during electroplating using the one of two opposing triangles or the hourglass shape of the undercut pattern.   
     
     
         2 . The method of  claim 1 , further comprising where the two opposing triangles comprise rounded vertices or the hourglass shape comprises rounded edges. 
     
     
         3 . The method of  claim 1 , further comprising:
 depositing a metal seed layer between the first surface of the first wafer and the layer; and   etching the metal seed layer after electroplating the metal into the undercut pattern.   
     
     
         4 . The method of  claim 1 , further comprising depositing an underfill material around the blade interconnect. 
     
     
         5 . The method of  claim 1 , further comprising depositing a solder layer on the blade interconnect. 
     
     
         6 . The method of  claim 1 , further comprising forming a blade interconnect on a first surface of a second wafer. 
     
     
         7 . The method of  claim 6 , further comprising hybrid bonding the blade interconnect of the second wafer at the chamfer of the blade interconnect of the first wafer. 
     
     
         8 . A method of forming blade interconnects, comprising:
 forming a first undercut pattern in a layer on a first surface of a first wafer, where the first undercut pattern, when viewed from above the first surface, comprises one of two opposing triangles in the layer or an hourglass shape in the layer;   electroplating a metal into the first undercut pattern to form a first blade interconnect;   forming a chamfer in the first blade interconnect during electroplating using the one of two opposing triangles or the hourglass shape of the first undercut pattern;   forming a second undercut pattern in a layer on a first surface of a second wafer, where the second undercut pattern, when viewed from above the first surface, comprises one of two opposing triangles in the layer or an hourglass shape in the layer;   electroplating a metal into the second undercut pattern to form a second blade interconnect;   forming a chamfer in the second blade interconnect during electroplating using the one of two opposing triangles or the hourglass shape of the second undercut pattern.   
     
     
         9 . The method of  claim 8 , further comprising where the two opposing triangles comprise rounded vertices or the hourglass shape comprises rounded edges. 
     
     
         10 . The method of  claim 8 , further comprising:
 depositing a metal seed layer between the first surface of the first wafer and the layer;   depositing a metal seed layer between the first surface of the second wafer and the layer; and   etching the metal seed layers after electroplating the metal into the first undercut pattern and electroplating the metal into the second undercut pattern.   
     
     
         11 . The method of  claim 8 , further comprising depositing an underfill material around the first blade interconnect and depositing an underfill material around the second blade interconnect. 
     
     
         12 . The method of  claim 8 , further comprising depositing a solder layer on the first blade interconnect and depositing a solder layer on the second blade interconnect. 
     
     
         13 . The method of  claim 8 , further comprising hybrid bonding the first blade interconnect and the second blade interconnect at the chamfer of the first blade interconnect and at the chamfer of the second blade interconnect. 
     
     
         14 . A method of forming blade interconnects, comprising:
 forming a first undercut pattern in a layer on a first surface of a first wafer, where the first undercut pattern, when viewed from above the first surface, comprises one of two opposing triangles in the layer or an hourglass shape in the layer;   electroplating a metal into the first undercut pattern to form a first blade interconnect;   forming a second undercut pattern in a layer on a first surface of a second wafer, where the second undercut pattern, when viewed from above the first surface, comprises one of two opposing triangles in the layer or an hourglass shape in the layer; and   electroplating a metal into the second undercut pattern to form a second blade interconnect.   
     
     
         15 . The method of  claim 14 , further comprising where the two opposing triangles comprise rounded vertices or the hourglass shape comprises rounded edges. 
     
     
         16 . The method of  claim 14 , further comprising:
 depositing a metal seed layer between the first surface of the first wafer and the layer;   depositing a metal seed layer between the first surface of the second wafer and the layer; and   etching the metal seed layers after electroplating the metal into the first undercut pattern and electroplating the metal into the second undercut pattern.   
     
     
         17 . The method of  claim 14 , further comprising depositing an underfill material around the first blade interconnect and depositing an underfill material around the second blade interconnect. 
     
     
         18 . The method of  claim 14 , further comprising depositing a solder layer on the first blade interconnect and depositing a solder layer on the second blade interconnect. 
     
     
         19 . The method of  claim 14 , further comprising hybrid bonding the first blade interconnect and the second blade interconnect at an intersection between the first blade interconnect and the second blade interconnect. 
     
     
         20 . The method of  claim 14 , wherein the first blade interconnect and the second blade interconnect each comprise a first sidewall and a second sidewall opposite the first sidewall; and
 wherein the first sidewall comprises an angle from the first surface of one of the first wafer or the second wafer of between 90 degrees and 170 degrees and the second sidewall comprises an angle from the first surface of one of the first wafer or the second wafer of between 90 degrees and 170 degrees.

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