US2020335992A1PendingUtilityA1

Supercapacitor based energy storage device

Assignee: KILOWATT LABS INCPriority: Sep 14, 2016Filed: Jun 18, 2020Published: Oct 22, 2020
Est. expirySep 14, 2036(~10.1 yrs left)· nominal 20-yr term from priority
H02J 7/56H02J 7/50H02J 7/875Y02T10/70H01M 2220/10Y02E60/13H01M 16/00H01M 10/425H02J 7/342H01M 10/0525H01G 11/10H01M 2010/4271H02J 7/345Y02E60/10H02J 7/0069H02J 7/0013H02J 7/0018
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Claims

Abstract

An energy storage device includes a charge storage assembly, an auxiliary storage element, and a charge control circuit. The charge storage assembly includes an array of supercapacitors coupled in series, a plurality of batteries, and a charge retention circuit. Each of the plurality of batteries is electrically coupled to a corresponding supercapacitor in the array of supercapacitors. The charge retention circuit is configured to maintain a charge state of at least one supercapacitor in the array of supercapacitors when the at least one supercapacitor is in an idle state. A charge control circuit is configured to selectively transfer charge between the at least one supercapacitor in the array of supercapacitors and the auxiliary storage element.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An energy storage device, comprising:
 a charge storage assembly including an array of supercapacitors;   an auxiliary storage element;   a charge control circuit configured to provide a charging current to the array of supercapacitors during a charging operation, wherein the charge control circuit is configured to selectively transfer charge between the at least one supercapacitor in the array of supercapacitors and the auxiliary storage element.   
     
     
         2 . The energy storage device of  claim 1 , comprising an imbalance detection circuit, wherein the charge control circuit is configured to transfer charge between the at least one supercapacitor and the auxiliary storage element when the imbalance detection circuit detects a charge imbalance between the at least one supercapacitor in the array and one or more remaining supercapacitors in the array. 
     
     
         3 . The energy storage device of  claim 2 , wherein the imbalance detection circuit is configured to detect one of an overcharge imbalance or an undercharge imbalance, and wherein the charge control circuit is configured to transfer charge from the at least one supercapacitor and the auxiliary storage when an overcharge imbalance is detected, and wherein the charge control circuit is configured to transfer charge from the auxiliary storage to the at least one supercapacitor when an undercharge imbalance is detected. 
     
     
         4 . The energy storage device of  claim 1 , wherein the charge control circuit comprises:
 at least one pulse-width modulation controller;   a plurality of insulated-gate bipolar transistors (IGBTs) electrically coupled to the at least one pulse-width modulation controller.   
     
     
         5 . The energy storage device of  claim 4 , wherein the at least one pulse-width modulation controller comprises a digital signal processor and at least one IGBT controller electrically coupled to the digital signal processor and configured to generate a first control signal and a second control signal for the plurality of IGBTs. 
     
     
         6 . The energy storage device of  claim 1 , wherein the charge control circuit comprises a plurality of charge control circuits, wherein each of the plurality of charge control circuits are coupled to one of the supercapacitors in the array of supercapacitors. 
     
     
         7 . The energy storage device of  claim 1 , wherein the charge storage assembly comprises a plurality of batteries, wherein each of the plurality of batteries is coupled a corresponding supercapacitor in the array of supercapacitors. 
     
     
         8 . The energy storage device of  claim 7 , wherein each of the plurality of batteries comprises a lithium ion battery. 
     
     
         9 . The energy storage device of  claim 1 , wherein the auxiliary storage comprises a supercapacitor. 
     
     
         10 . The energy storage device of  claim 1 , comprising a charge retention circuit configured to maintain a charge state of each supercapacitor in the array of supercapacitors when each supercapacitor is idle. 
     
     
         11 . The energy storage device of  claim 10 , wherein the charge retention circuit is configured to generate a predetermined leakage current. 
     
     
         12 . The energy storage device of  claim 1 , comprising a control logic element coupled to the charge control circuit, wherein the control logic is configured to generate one or more control signals for the charge control circuit. 
     
     
         13 . An energy storage device, comprising:
 a charge storage assembly comprising:
 an array of supercapacitors coupled in series; and 
 a plurality of batteries, wherein each of the plurality of batteries is electrically coupled to a corresponding supercapacitor in the array of supercapacitors; and 
   a charge retention circuit configured to maintain a charge state of each supercapacitor in the array of supercapacitors when each supercapacitor is in an idle state.   
     
     
         14 . The energy storage device of  claim 13 , wherein the charge retention circuit is configured to generate a leakage current from a selected one of the plurality of batteries associated with an idle supercapacitor, wherein the leakage current maintains the charge state of the idle supercapacitor. 
     
     
         15 . The energy storage device of  claim 13 , wherein each of the plurality of batteries comprises a lithium ion battery. 
     
     
         16 . The energy storage device of  claim 13 , wherein the charge retention circuit comprises a plurality of charge retention circuits, and wherein each of the plurality of charge retention circuits is coupled to a corresponding supercapacitor in the array of supercapacitors. 
     
     
         17 . An energy storage device, comprising:
 a charge storage assembly comprising:
 an array of supercapacitors coupled in series; and 
 a plurality of batteries, wherein each of the plurality of batteries is electrically coupled to a corresponding supercapacitor in the array of supercapacitors; 
 a plurality of charge retention circuits, wherein each of the plurality of charge retention circuits is coupled to a corresponding supercapacitor in the array of supercapacitors, and wherein each of the plurality of charge retention circuits are configured to maintain a charge state of the corresponding supercapacitor in the array of supercapacitors when the corresponding supercapacitor is in an idle state; 
   an auxiliary storage element; and   a plurality of charge control circuits configured to selectively transfer charge between at least one supercapacitor in the array of supercapacitors and the auxiliary storage element.   
     
     
         18 . The energy storage device of  claim 17 , comprising an imbalance detection circuit, wherein the charge control circuit is configured to transfer charge between the at least one supercapacitor and the auxiliary storage element when the imbalance detection circuit detects a charge imbalance between the at least one supercapacitor in the array and one or more remaining supercapacitors in the array. 
     
     
         19 . The energy storage device of  claim 18 , wherein the imbalance detection circuit is configured to detect one of an overcharge imbalance or an undercharge imbalance, and wherein the charge control circuit is configured to transfer charge from the at least one supercapacitor and the auxiliary storage when an overcharge imbalance is detected, and wherein the charge control circuit is configured to transfer charge from the auxiliary storage to the at least one supercapacitor when an undercharge imbalance is detected. 
     
     
         20 . The energy storage device of  claim 17 , wherein the charge control circuit comprises:
 at least one pulse-width modulation controller;   a plurality of insulated-gate bipolar transistors (IGBT) electrically coupled to the at least one pulse-width modulation controller.

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