Method of fabricating package substrates

Abstract

This disclosure provides a package substrate fabrication method including: providing a carrier; forming a first dielectric layer on the carrier while enabling the first dielectric layer to be patterned including an opening; forming a first conducting unit on the carrier while enabling the first conducting unit to fill up the opening, a height of the first conducting unit at the opening larger than a thickness of the first dielectric layer, and a width of the first conducting unit larger than a width of the opening; forming a second dielectric layer on the first conducting unit; forming a second conducting unit on the second dielectric layer; forming a third dielectric layer on the second conducting unit; removing the carrier and the first dielectric layer while enabling the part of the first conducting unit in the opening to be removed; and forming a fourth dielectric layer to cover the first conducting unit.

What is claimed is: 
     
         1 . A method for fabricating a package substrate, comprising steps of:
 providing a first carrier and a second carrier;   forming a first dielectric layer on the first carrier while enabling the first dielectric layer to be patterned including a first opening exposing the first carrier;   forming a second dielectric layer on the second carrier while enabling the second dielectric layer to be patterned including a second opening exposing the second carrier;   forming a first conducting unit on the first carrier while enabling a part of the first conducting unit to fill up the first opening, a height of the first conducting unit at the first opening to be larger than a thickness of the first dielectric layer, and a width of the first conducting unit above the first dielectric layer to be larger than a width of the first opening;   forming a second conducting unit on the second carrier while enabling a part of the second conducting unit to fill up the second opening, a height of the second conducting unit at the second opening to be larger than a thickness of the second dielectric layer, and a width of the second conducting unit above the second dielectric layer to be larger than a width of the second opening;   forming a third dielectric layer between the first and second conducting units;   removing the first carrier while enabling the first dielectric layer to be removed, and removing the second carrier while enabling the second dielectric layer to be removed; and   forming a fourth dielectric layer while enabling the same to cover the first and second conducting units.   
     
     
         2 . The method of  claim 1 , wherein the first and second conducting units are formed by electrolytic plating. 
     
     
         3 . The method of  claim 1 , wherein the step of forming the third dielectric layer includes:
 interposing the third dielectric layer between the first and second carriers, and pressing the first and second carriers toward the third dielectric layer.   
     
     
         4 . The method of  claim 1 , wherein the first and second conductive units are formed of Cu, Ni, Sn, Ni/Au or their combination. 
     
     
         5 . A method for fabricating a package substrate, comprising steps of:
 providing a first carrier and a second carrier;   forming a first dielectric layer on the first carrier while enabling the first dielectric layer to be patterned including a first opening exposing the first carrier;   forming a second dielectric layer on the second carrier while enabling the second dielectric layer to be patterned including a second opening exposing the second carrier;   forming a first conducting unit on the first carrier while enabling a part of the first conducting unit to fill up the first opening, a height of the first conducting unit at the first opening to be larger than a thickness of the first dielectric layer, and a width of the first conducting unit above the first dielectric layer to be larger than a width of the first opening;   forming a second conducting unit on the second carrier while enabling a part of the second conducting unit to fill up the second opening, a height of the second conducting unit at the second opening to be larger than a thickness of the second dielectric layer, and a width of the second conducting unit above the second dielectric layer to be larger than a width of the second opening;   forming a third dielectric layer between the first and second conducting units;   removing the first carrier while enabling the part of the first conducting unit in the first opening to be removed, and removing the second carrier while enabling the part of the second conducting unit in the second opening to be removed; and   forming a fourth dielectric layer while enabling the same to cover the first and second conducting units.   
     
     
         6 . The method of  claim 5 , wherein the first and second conducting units are formed by electrolytic plating. 
     
     
         7 . The method of  claim 5 , wherein the step of forming the third dielectric layer includes:
 interposing the third dielectric layer between the first and second carriers, and pressing the first and second carriers toward the third dielectric layer.   
     
     
         8 . The method of  claim 5 , further comprising steps that are being performed prior to the forming of the fourth dielectric layer:
 forming a third conducting unit on the first conducting unit.   
     
     
         9 . The method of  claim 5 , wherein the first and second conductive units are formed of Cu, Ni, Sn, Ni/Au or their combination. 
     
     
         10 . A method for fabricating a package substrate, comprising steps of:
 providing a first carrier and a second carrier;   forming a first dielectric layer on the first carrier while enabling the first dielectric layer to be patterned including a first opening exposing the first carrier;   forming a second dielectric layer on the second carrier while enabling the second dielectric layer to be patterned including a second opening exposing the second carrier;   forming a first conducting unit on the first carrier while enabling a part of the first conducting unit to fill up the first opening, a height of the first conducting unit at the first opening to be larger than a thickness of the first dielectric layer, and a width of the first conducting unit above the first dielectric layer to be larger than a width of the first opening;   forming a second conducting unit on the second carrier while enabling a part of the second conducting unit to fill up the second opening, a height of the second conducting unit at the second opening to be larger than a thickness of the second dielectric layer, and a width of the second conducting unit above the second dielectric layer to be larger than a width of the second opening;   forming a third dielectric layer on the first conducting unit, and forming a fourth dielectric layer on the second conducting unit;   removing the second carrier while enabling the part of the second conducting unit in the second opening to be removed;   joining the second conducting unit to the third dielectric layer;   removing the first carrier while enabling the part of the first conducting unit in the first opening to be removed, and   forming a fifth dielectric layer while enabling the same to cover the first conducting unit.   
     
     
         11 . The method of  claim 10 , wherein the first and second conducting units are formed by electrolytic plating. 
     
     
         12 . The method of  claim 10 , wherein the step of joining the second conducting unit to the third dielectric layer includes:
 pressing the first carrier and the fourth dielectric layer toward the third dielectric layer.   
     
     
         13 . The method of  claim 10 , further comprising steps that are being performed prior to the forming of the fifth dielectric layer:
 forming a third conducting unit on the first conducting unit.   
     
     
         14 . The method of  claim 10 , wherein the first and second conductive units are formed of Cu, Ni, Sn, Ni/Au or their combination.