Compensating dc loss in usb 2.0 high speed applications

Abstract

In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.

What is claimed is: 
     
         1 . A USB 2.0 system comprising:
 current source;   a first switch;   a second switch;   a first voltage threshold comparator;   a second voltage threshold comparator;   a third voltage threshold comparator;   a fourth voltage threshold comparator;   a first logic circuit;   a second logic circuit;   the current source is coupled to a channel input of the first switch and a channel input of the second switch;   an output of the first switch is coupled to a positive data line in a USB 2.0 communication system;   an output of the second switch is coupled to a negative data line in the USB 2.0 communication system;   a first input of the first voltage threshold comparator is coupled to the negative data line, a second input of the first voltage threshold comparator is coupled to the positive data line, and an output of the first voltage threshold comparator is coupled to a first input of the first logic circuit;   a first input of the second voltage threshold comparator is coupled to the negative data line, a second input of the second voltage threshold comparator is coupled to the positive data line, and an output of the second voltage threshold comparator is coupled to a second input of the first logic circuit;   an output of the first logic circuit is coupled to a control input of the first switch;   a first input of the third voltage threshold comparator is coupled to the positive data line, a second input of the third voltage threshold comparator is coupled to the negative data line, and an output of the third voltage threshold comparator is coupled to a first input of the second logic circuit;   a first input of the fourth voltage threshold comparator is coupled to the positive data line, a second input of the fourth voltage threshold comparator is coupled to the negative data line, and an output of the fourth voltage threshold comparator is coupled to a first input of the second logic circuit; and   an output of the second logic circuit is coupled to a control input of the second switch.   
     
     
         2 . A USB 2.0 system comprising:
 a current source;   a transistor having a first channel terminal, a second channel terminal, and a control terminal;   a voltage threshold comparator;   the current source is coupled to the first channel terminal of the transistor;   the second channel terminal of the transistor is coupled to a positive or negative data line in a USB 2.0 communication system;   a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to the control terminal of the transistor.   
     
     
         3 . The system of  claim 2 , wherein:
 the voltage threshold comparator is an operational amplifier;   the first input of the voltage threshold comparator is a non-inverting input; and   the second input of the first voltage threshold comparator is an inverting input.   
     
     
         4 . The system of  claim 2 , wherein the voltage threshold comparator is a first voltage threshold comparator, the first voltage threshold comparator is coupled to the first channel terminal of the transistor through a logic circuit, wherein the output of the first voltage threshold comparator is coupled to a first input of the logic circuit and the output of the logic circuit is coupled to the control electrode of the transistor; and further comprising:
 a second voltage threshold comparator; and   a first input of the second voltage threshold comparator receiving the negative data line, a second input of the second voltage threshold comparator receiving a positive data line, and an output of the second voltage threshold comparator coupled to a second input of the logic circuit.   
     
     
         5 . The system of  claim 2 , wherein:
 the transistor is a first switch;   the output of the first switch is coupled to the positive data line; and   the voltage threshold comparator is a first comparator; and   further comprising:
 a second switch; 
 a channel input of the second switch is coupled to the current source; 
 an output of the second switch coupled to the negative data line; 
 a second voltage threshold comparator; and 
 a first input of the second voltage threshold comparator is coupled to the positive data line, a second input of the second voltage threshold comparator receiving a negative data line, and an output of the second voltage threshold comparator coupled to a control input of the second switch. 
   
     
     
         6 . The system of  claim 5 , further comprising:
 a third switch;   a logic circuit;   a channel input of the third switch coupled to the current source, a control input of the third switch coupled to an output of the logic circuit, and an output of the third switch is coupled to ground; and   a first input of the logic circuit is coupled to the output of the first voltage threshold comparator and a second input of the logic circuit is coupled to the output of the second voltage threshold comparator.   
     
     
         7 . The system of  claim 2 , wherein the output of the voltage threshold comparator is coupled to the control electrode of the transistor via a buffer.