Methods and devices for solderless integration of multiple semiconductor dies on flexible substrates

Abstract

Methods and devices for solderless integration of multiple semiconductor dies on flexible substrates. In some embodiments, a method for solderless integration of multiple semiconductor dies on flexible substrates includes arranging one or a plurality of semiconductor dies on a first carrier, active side down, and then depositing a sacrificial material over them. In some embodiments, the method further includes removing the first carrier and then building a wafer-level redistribution layer (RDL) over the active side of the one or plurality of semiconductor dies and the sacrificial material. In some embodiments, the method includes patterning the wafer-level RDL to form an outline of a final module footprint and then applying a second carrier to the wafer-level RDL. In some embodiments, the method can also include removing the sacrificial material from the one or plurality of semiconductor dies and the wafer-level RDL to achieve an integration of the one or plurality of semiconductor dies.

What is claimed is: 
     
         1 . An integrated circuit device comprising:
 one or more semiconductor dies, each comprising at least an active side; and   a wafer-level redistribution layer (RDL) that forms a directly metallized connection with the active side of each of the one or more semiconductor dies and comprises a flexible substrate material that supports the one or more semiconductor dies together, while allowing substantial movement of the wafer-level RDL in any direction with respect to the one or more semiconductor dies and without any physically observable deformation in the integrated circuit device.   
     
     
         2 . The integrated circuit device of  claim 1 , wherein the one or more semiconductor dies comprises a plurality of semiconductor dies. 
     
     
         3 . The integrated circuit device of  claim 2 , wherein the flexible substrate material comprises die-to-die interconnects with material properties configured to reduce stress caused by cyclic thermal expansion and contraction; and
 wherein the one or more semiconductor dies is substantially less flexible than the wafer-level RDL.   
     
     
         4 . The integrated circuit device of  claim 1 , wherein the wafer-level RDL comprises one or more contacts; and
 wherein each of the one or more contacts is in communication with at least one semiconductor die of the one or more semiconductor dies.   
     
     
         5 . The integrated circuit device of  claim 4 , wherein the contacts comprise a metal selected from a group consisting of copper, aluminum, nickel, gold, titanium, vanadium, silver, and chromium. 
     
     
         6 . The integrated circuit device of  claim 1 , wherein the one or more semiconductor dies are plasma-diced or non-rectangular in shape. 
     
     
         7 . The integrated circuit device of  claim 6 , wherein the one or more semiconductor dies are arranged in close proximity to each other for bendable applications. 
     
     
         8 . The integrated circuit device of  claim 1 , further comprising redistribution metals or dielectrics, or redistribution metals and dielectrics, without solder, as a structural and electrical connection between the one or more semiconductor dies and the one or more contacts. 
     
     
         9 . An integrated circuit module for use in flexible electronics manufactured by a process comprising:
 arranging one or more semiconductor dies, each comprising at least an active side, in a desired arrangement within a sacrificial material layer;   building a wafer-level redistribution layer (RDL) over the active side of each of the one or more semiconductor dies and the sacrificial material layer, wherein the wafer-level RDL forms a directly metallized connection with the active side of each of the one or more semiconductor dies;   patterning a portion of the wafer-level RDL to form an outline of a final module footprint;   affixing a first carrier to the wafer-level RDL built over the active side of the one or more semiconductor dies and the sacrificial material layer;   removing at least a portion or all of the sacrificial material layer from the one or more semiconductor dies and the wafer-level RDL to achieve an integration of the one or more semiconductor dies; and   removing the first carrier from the active side of the one or more semiconductor dies or individually removing integrated semiconductor dies, along with their respective wafer-level RDL, from the first carrier;   wherein the wafer-level RDL comprises a flexible substrate material that serves as a flexible supporting substrate of the one or more semiconductor dies; and   wherein the one or more semiconductor dies is significantly less flexible than the wafer-level RDL.   
     
     
         10 . The integrated circuit module of  claim 9 , wherein the one or more semiconductor dies comprises a plurality of semiconductor dies. 
     
     
         11 . The integrated circuit module of  claim 10 , wherein the flexible substrate material comprises die-to-die interconnects with material properties that reduce stress caused by cyclic thermal expansion and contraction. 
     
     
         12 . The integrated circuit module of  claim 9 , wherein the wafer-level RDL comprises one or more contacts;
 wherein each of the one or more contacts is in electronic communication with at least one semiconductor die of the one or more semiconductor dies.   
     
     
         13 . The integrated circuit module of  claim 12 , wherein the contacts comprise a metal selected from a group consisting of copper, aluminum, nickel, gold, titanium, vanadium, silver, and chromium. 
     
     
         14 . The integrated circuit module of  claim 12 , the process further comprising exposing the one or more contacts on an opposite side of the wafer-level RDL as the one or more semiconductor dies. 
     
     
         15 . The integrated circuit module of  claim 9 , wherein the one or more semiconductor dies are plasma-diced or non-rectangular in shape. 
     
     
         16 . The integrated circuit module of  claim 15 , wherein the one or more semiconductor dies are arranged in close proximity to each other for wearable applications. 
     
     
         17 . The integrated circuit module of  claim 9 , the process further comprising providing redistribution metals or dielectrics, or redistribution metals and dielectrics, without solder, as a structural and electrical connection between the one or more semiconductor dies and the one or more contacts. 
     
     
         18 . The integrated circuit module of  claim 9 , wherein arranging the one or more semiconductor dies in the desired arrangement comprises arranging the one or more semiconductor dies on a second carrier, wherein the active side of each of the one or more semiconductor dies is placed on the first carrier. 
     
     
         19 . The integrated circuit module of  claim 18  wherein the sacrificial material layer is deposited over the one or more semiconductor dies and the second carrier. 
     
     
         20 . The integrated circuit module of  claim 19  further comprising removing the second carrier from the sacrificial material layer and the one or more semiconductor dies.