Dual silicide wrap-around contacts for semiconductor devices
Abstract
Low-resistivity dual silicide contacts for aggressively scaled semiconductor devices. A semiconductor device includes a first raised feature in a n-type channel field effect transistor (NFET) region on a substrate, a first n-type doped epitaxial semiconductor material wrapped around the first raised feature, a first metal silicide contact layer wrapped around the first n-type doped epitaxial semiconductor material, a second raised feature in p-type channel field effect transistor (PFET) region on the substrate, a second p-type epitaxial semiconductor material wrapped around the second raised feature, and a second metal silicide contact layer wrapped around the second p-type doped epitaxial semiconductor material. The first metal silicide contact layer can include a titanium silicide and the second metal silicide contact layer can include a ruthenium silicide.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device, comprising:
a first raised feature in a n-type channel field effect transistor (NFET) region on a substrate; a first n-type doped epitaxial semiconductor material wrapped around the first raised feature; a first metal silicide contact layer wrapped around the first n-type doped epitaxial semiconductor material; a second raised feature in p-type channel field effect transistor (PFET) region on the substrate; a second p-type epitaxial semiconductor material wrapped around the second raised feature; and a second metal silicide contact layer wrapped around the second p-type doped epitaxial semiconductor material.
2 . The device of claim 1 , wherein the first and second raised features contain Si fins.
3 . The device of claim 1 , wherein the first n-type doped epitaxial semiconductor material contains Si:P or Si:As.
4 . The device of claim 1 , wherein the second p-type doped epitaxial semiconductor material contains Si:B or SiGe:B.
5 . The device of claim 1 , wherein the first and second doped epitaxial materials each have upward facing surfaces and downward facing surfaces, and the first and second metal silicide contact layers are formed on the upward facing surfaces and on the downward facing surfaces.
6 . The device of claim 1 , wherein the first metal silicide contact layer includes a titanium silicide and the second metal silicide contact layer contains a silicide of ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), or platinum (Pt).
7 . The device of claim 1 , further comprising:
a titanium nitride (TiN) layer directly on the first silicide contact layer and on the second metal silicide contact layer; and a cobalt metal layer or a ruthenium metal layer on the TiN layer.
8 . A semiconductor device, comprising:
a first raised Si feature in a n-type channel field effect transistor (NFET) region on a substrate; a first n-type doped epitaxial semiconductor material wrapped around the first raised Si feature, the first doped epitaxial semiconductor material containing Si:P or Si:As; a titanium silicide contact layer wrapped around the first n-type doped epitaxial semiconductor material; a second raised Si feature in p-type channel field effect transistor (PFET) region on the substrate; a second p-type doped epitaxial semiconductor material wrapped around the second raised feature, the second p-type epitaxial semiconductor material containing Si:B or SiGe:B; and a ruthenium silicide contact layer wrapped around the second p-type doped epitaxial semiconductor material.
9 . The device of claim 8 , wherein the first and second doped epitaxial materials each have upward facing surfaces and downward facing surfaces, and the titanium silicide contact layer and the ruthenium silicide contact layer are formed on the upward facing surfaces and on the downward facing surfaces.
10 . The device of claim 8 , further comprising:
a titanium nitride (TiN) layer directly on the titanium silicide contact layer and on the ruthenium silicide contact layer; and a cobalt (Co) metal layer or a ruthenium (Ru) metal layer on the TiN layer.
11 . A method of forming a semiconductor device, the method comprising:
growing a first n-type doped epitaxial semiconductor material on a first raised feature in a n-type channel field effect transistor (NFET) region of a substrate, wherein the first n-type doped epitaxial semiconductor material is wrapped around the first raised feature; selectively depositing a first metal layer on the first n-type doped epitaxial semiconductor material; annealing the substrate to form a first metal silicide contact layer on the first n-type doped epitaxial semiconductor material by a salicidation reaction between the first contact metal and the first n-type doped epitaxial semiconductor material; growing a second p-type doped epitaxial semiconductor material on a second raised feature in a p-type channel field effect transistor (PFET) region of the substrate; selectively depositing a second metal layer on the second p-type doped epitaxial semiconductor material; and annealing the substrate to form a second metal silicide contact layer on the second p-type doped epitaxial semiconductor material by a salicidation reaction between the second contact metal and the second p-type doped epitaxial semiconductor material.
12 . The method of claim 11 , wherein the first and second raised features contain Si.
13 . The method of claim 11 , wherein the first n-type doped epitaxial semiconductor material contains Si:P or Si:As.
14 . The device of claim 11 , wherein the second p-type doped epitaxial semiconductor material contains Si:B or SiGe:B.
15 . The method of claim 11 , wherein the first and second doped epitaxial materials each have an upward facing surface and a downward facing surface.
16 . The method of claim 11 , wherein the first metal layer includes titanium metal and the second metal layer includes ruthenium metal.
17 . The method of claim 11 , wherein the first metal silicide contact layer includes a titanium silicide and the second metal silicide contact layer contains a silicide of ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), or platinum (Pt).
18 . The method of claim 11 , further comprising:
a titanium nitride (TiN) layer directly on the first metal silicide contact layer and on the second metal silicide contact layer; and a cobalt (Co) metal layer or a ruthenium (Ru) metal layer on the TiN layer.
19 . The method of claim 11 , wherein the first and second raised features contain Si, the first n-type doped epitaxial semiconductor material contains Si:P or Si:As, the second p-type doped epitaxial semiconductor material contains Si:B or SiGe:B, the first metal silicide contact layer includes a titanium silicide, and the second metal silicide contact layer includes a ruthenium silicide.
20 . The method of claim 11 , wherein the first and second doped epitaxial materials each have an upward facing surface and a downward facing surface.Join the waitlist — get patent alerts
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