Semiconductor device having 3d inductor and method of manufacturing the same

Abstract

A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first substrate including a first conductive pad and a second conductive pad;   a first transverse inductor located on the first substrate and including a plurality of first inductor portions, the first inductor portions are arranged on the first substrate radially and each include a first exterior end and a first interior end, wherein one of the first inductor portions is connected to the first conductive pad, and another one of the first inductor portions is connected to the second conductive pad;   a longitudinal inductor located on the first transverse inductor and including a supportive layer, a plurality of exterior inductor portions and a plurality of interior inductor portions, the supportive layer includes a plurality of exterior openings and a plurality of interior openings, the exterior and interior inductor portions are located in the exterior and interior openings, respectively;   a second transverse inductor located on the longitudinal inductor and including an insulation layer and a plurality of second inductor portions, the insulation layer includes a plurality of openings arranged radially, the second inductor portions are located in the openings, arranged radially and each include a second exterior end and a second interior end, wherein both ends of each of the exterior inductor portions are connected to the first exterior end of the first inductor portions and the second exterior end of the second inductor portions, respectively, both ends of each of the interior inductor portions are connected to the first interior end of the first inductor portions and the second interior end of the second inductor portions, respectively, and the exterior and interior inductor portions connected to the same second inductor portion are connected to two of the adjacent first inductor portions, respectively; and   a second substrate located on the second transverse inductor.   
     
     
         2 . The semiconductor device in accordance with  claim 1 , wherein two of the adjacent first inductor portions are connected to the first and second conductive pads, respectively. 
     
     
         3 . The semiconductor device in accordance with  claim 1 , wherein two of the adjacent first inductor portions are connected to the first and second conductive pads, respectively, through the first exterior end. 
     
     
         4 . The semiconductor device in accordance with  claim 1 , wherein an intersection of the first and second inductor portions connected to the same exterior inductor portion defines a first overlap area, an intersection of the first and second inductor portions connected to the same interior inductor portion defines a second overlap area, and the first overlap area is larger than the second overlap area. 
     
     
         5 . The semiconductor device in accordance with  claim 1 , wherein a width of the first exterior end is larger than a width of the first interior end, and a width of the second exterior end is larger than a width of the second interior end. 
     
     
         6 . The semiconductor device in accordance with  claim 1 , wherein a distance between the first exterior ends of two of the adjacent first inductor portions is larger than a distance between the first interior ends of two of the adjacent first inductor portions. 
     
     
         7 . The semiconductor device in accordance with  claim 1 , wherein a height of the exterior inductor portions is substantially equal to a height of the interior inductor portions and higher than a height of the second inductor portions. 
     
     
         8 . The semiconductor device in accordance with  claim 1  further comprising a solder layer including a plurality of exterior bonding portions and a plurality of interior bonding portions, wherein the exterior bonding portions are connected to the exterior inductor portions and the first exterior end of the first inductor portions, and the interior bonding portions are connected to the interior inductor portions and the first interior end of the first inductor portions. 
     
     
         9 . The semiconductor device in accordance with  claim 1  further comprising a protective layer located between the first substrate and the longitudinal inductor and including a plurality of first exposing openings and a plurality of second exposing openings, wherein the first exterior end and the first interior end of the first inductor portions are exposed by the first exposing openings and the second exposing openings, respectively. 
     
     
         10 . A method of manufacturing a semiconductor device, comprising:
 forming a first transverse inductor on a first substrate, the first substrate includes a first conductive pad and a second conductive pad, the first transverse inductor includes a plurality of first inductor portions which are formed on the first substrate radially and each include a first exterior end and a first interior end, wherein one of the first inductor portions is connected to the first conductive pad and another one of the first inductor portions is connected to the second conductive pad;   forming a second transverse inductor on a second substrate, the second transverse inductor includes an insulation layer and a plurality of second inductor portions, the insulation layer is formed on the second substrate and includes a plurality of openings arranged radially; the second inductor portions are formed in the openings, arranged radially and each include a second exterior end and a second interior end;   forming a longitudinal inductor on the second transverse inductor, the longitudinal inductor includes a supportive layer, a plurality of exterior inductor portions and a plurality of interior inductor portions, the supportive layer is formed on the second transverse inductor and includes a plurality of exterior openings and a plurality of interior openings, the second exterior end and the second interior end of the second inductor portions are exposed by the exterior openings and the interior openings, respectively, the exterior inductor portions are formed in the exterior openings to connect to the second exterior end of the second inductor portions, and the interior inductor portions are formed in the interior openings to connect to the second interior end of the second inductor portions; and   bonding the longitudinal inductor and the first transverse inductor, the exterior inductor portions and the interior inductor portions are connected to the first exterior end and the first interior end of the first inductor portions, respectively, wherein the exterior and interior inductor portions connected to the same second inductor portion are connected to two of the adjacent first inductor portions, respectively.   
     
     
         11 . The manufacturing method in accordance with  claim 10 , wherein two of the adjacent first inductor portions are connected to the first and second conductive pads, respectively. 
     
     
         12 . The manufacturing method in accordance with  claim 10 , wherein two of the adjacent first inductor portions are connected to the first and second conductive pads, respectively, through the first exterior end. 
     
     
         13 . The manufacturing method in accordance with  claim 10 , wherein an intersection of the first and second inductor portions connected to the same exterior inductor portion defines a first overlap area, an intersection of the first and second inductor portions connected to the same interior inductor portion defines a second overlap area, and the first overlap area is larger than the second overlap area. 
     
     
         14 . The manufacturing method in accordance with  claim 10 , wherein a width of the first exterior end is larger than a width of the first interior end, and a width of the second exterior end is larger than a width of the second interior end. 
     
     
         15 . The manufacturing method in accordance with  claim 10 , wherein a distance between the first exterior ends of two of the adjacent first inductor portions is larger than a distance between the first interior ends of two of the adjacent first inductor portions. 
     
     
         16 . The manufacturing method in accordance with  claim 10 , wherein a height of the exterior inductor portions is substantially equal to a height of the interior inductor portions and higher than a height of the second inductor portions. 
     
     
         17 . The manufacturing method in accordance with  claim 10 , wherein a solder layer is formed on the longitudinal inductor after forming the longitudinal inductor, the solder layer includes a plurality of exterior bonding portions and a plurality of interior bonding portions, wherein when bonding the longitudinal inductor and the first transverse inductor, the exterior bonding portions are configured to connect the exterior inductor portions and the first exterior end of the first inductor portions, and the interior bonding portions are configured to connect the interior inductor portions and the first interior end of the first inductor portions. 
     
     
         18 . The manufacturing method in accordance with  claim 10 , wherein a protective layer is formed on the first transverse inductor after forming the first transverse inductor, the protective layer includes a plurality of first exposing openings and a plurality of second exposing openings, the first exterior end and the first interior end of the first inductor portions are exposed by the first exposing openings and the second exposing openings, respectively.