Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Abstract

A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate electrode as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode is amorphized. Subsequently, a silicon oxide film is provided to cover the gate electrode, at a temperature which is less than the one at which recrystallization of the gate electrode occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode, and high tensile stress is applied to a channel region under the gate electrode. As a result, carrier mobility of the nMOS transistor is enhanced.

1 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) preparing a silicon substrate;   (b) forming first and second gate electrodes of a non-single crystalline silicon in an re-channel MOS transistor forming region and a p-channel MOS transistor forming region respectively on the silicon substrate;   (c) masking the p-channel MOS transistor forming region.   (d) implanting an n-type dopants and an electrically inactive ions in the first gate electrode;   (e) depositing a predetermined film so as to cover the first gate electrode and the second gate electrode; and   (f) performing a thermal processing at a temperature range between 950 degree C. and 1100 degree C. to recrystallize the non-single crystalline silicon wherein,   
       the electrically inactive ions have a mass number of 70 or more. 
     
     
         2 . A method of manufacturing a semiconductor device according to the  claim 1 , wherein
 the electrically inactive ions are implanted before the n-type dopants are implanted.   
     
     
         3 . A method of manufacturing a semiconductor device according to the  claim 2 , wherein
 the electrically inactive ions are germanium.   
     
     
         4 . A method of manufacturing a semiconductor device according to the  claim 3 , wherein
 the n-type dopants have a mass number of 70 or more   
     
     
         5 . A method of manufacturing a semiconductor device according to the  claim 4 , wherein
 the n-type dopants are arsenic or antimony.   
     
     
         6 . A method of manufacturing a semiconductor device according to the  claim 1 , wherein
 in the step (d) includes forming a source region and a drain region of the n-channel MOS transistor, and   the n-type dopants are implanted in the source region and the drain region of the n-channel MOS transistor.   
     
     
         7 . A method of manufacturing a semiconductor device according to the  claim 1 , wherein
 in the step (e), the predetermined film is formed at a temperature of 550 degree C. or less.   
     
     
         8 . A method of manufacturing a semiconductor device according to the  claim 1 , further comprising:
 (g) after step (f), removing the predetermined film;   (h) after step (g), forming a silicide layer over the first gate electrode and the second gate electrode.   
     
     
         9 . A method of manufacturing a semiconductor device according to the  claim 1 , further comprising:
 (i) after the step (b) and before the step (e), masking the n-channel MOS transistor forming region; and   (j) after the step (j), implanting p-type dopants in the p-channel MOS transistor forming region including the second gate electrode.   
     
     
         10 . A method of manufacturing a semiconductor device according to the  claim 9 , further comprising:
 (k) after the step (e) and before the step (f), removing a part of the predetermined film covered on the second gate electrode.   
     
     
         11 . A method of manufacturing a semiconductor device according to the  claim 1 , wherein
 the predetermined film has a property that it shrinks by the thermal processing.   
     
     
         12 . A method of manufacturing a semiconductor device according to the  claim 1 , wherein
 the predetermined film includes a silicon oxide.