US2020219905A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

Assignee: SEMICONDUCTOR ENERGY LABPriority: Nov 6, 2009Filed: Mar 19, 2020Published: Jul 9, 2020
Est. expiryNov 6, 2029(~3.3 yrs left)· nominal 20-yr term from priority
H10P 14/3462H10D 30/6734H10D 84/84H10D 30/6755H10D 86/471H10D 86/60H10D 62/40H10D 30/6739H10D 86/0231H10D 86/0221H10D 62/405H10D 62/80H10D 30/6757H10D 30/6756H10D 30/6746H10D 30/6745H10D 30/6732H10D 86/423H01L 27/1251H01L 27/1288H01L 29/045H01L 29/78696H01L 27/127H01L 29/7869H01L 29/4908H01L 27/0883H01L 29/24H01L 29/78693H01L 27/1225
74
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a first transistor; and   a second transistor,   wherein the first transistor comprises:
 a first conductive film; 
 a first oxide semiconductor layer over the first conductive film; and 
 a second conductive film over the first oxide semiconductor layer, 
   wherein the second transistor comprises:
 a third conductive film; 
 a second oxide semiconductor layer over the third conductive film; and 
 a fourth conductive film over the second oxide semiconductor layer, 
   wherein the first oxide semiconductor layer comprises In, Ga and Zn,   wherein the second oxide semiconductor layer comprises In, Ga and Zn,   wherein the first oxide semiconductor layer comprises a first crystal region on a surface of the first oxide semiconductor layer,   wherein the first oxide semiconductor layer has a channel formation region in the first crystal region,   wherein the second oxide semiconductor layer comprises a second crystal region on a surface of the second oxide semiconductor layer,   wherein the second oxide semiconductor layer has a channel formation region in the second crystal region,   wherein the first conductive film and the first oxide semiconductor layer overlap each other, and have a region as a first gate electrode,   wherein the second conductive film and the first oxide semiconductor layer overlap each other, and have a region as a second gate electrode,   wherein the third conductive film and the second oxide semiconductor layer overlap each other, and have a region as a third gate electrode,   wherein the fourth conductive film and the second oxide semiconductor layer overlap each other, and have a region as a fourth gate electrode,   wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to a first wiring,   wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor, and   wherein the other of the source electrode and the second electrode is electrically connected to a second wiring.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein each of the first conductive film, the second conductive film, the third conductive film and the fourth conductive film has a light-transmitting property. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein each of the first crystal region and the second crystal region comprises a nanocrystal. 
     
     
         5 . The semiconductor device according to  claim 3 , wherein each of the first crystal region and the second crystal region comprises a nanocrystal.

Join the waitlist — get patent alerts

Track US2020219905A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.