Semiconductor device

Abstract

The semiconductor wiring has the N-well layer of the impurity layer in the P substrate formed in the region where the poly wiring and P substrate face each other, wherein the N-well layer is electrically floating, is not used as a circuit element, and does not input or output signals. The semiconductor wiring is used as a transmission path of a high voltage signal, and used for a wiring that transmits a write signal of information at the memory cell array of the

What is claimed is: 
     
         1 . A semiconductor device including a semiconductor wiring, comprising:
 a first semiconductor region of a first conductivity type;   an insulating layer formed on the first semiconductor region;   a semiconductor wiring layer formed as a current flow path between circuit elements and facing the first semiconductor region via the insulating layer; and   a floating layer provided in the first semiconductor region facing the semiconductor wiring layer via the insulating layer, and including impurities of a second conductivity type, the floating layer electrically floating without being connected to the circuit elements.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein when the first conductivity type is a P type, the floating layer is an N-type semiconductor layer or N-well layer of the second conductivity type. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein a width of the floating layer is equal to or less than a width of the semiconductor wiring layer. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein when the floating layer has a rectangular cross-sectional shape, the floating layer is formed facing at least one surface of the semiconductor wiring layer. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the semiconductor wiring layer is formed of a semiconductor material including poly silicon. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the semiconductor wiring includes a wiring that transmits a signal equal to or more than a voltage value at which the signal transmitted between the circuit elements generates substrate hot electrons that jump from the first semiconductor region into the semiconductor wiring layer. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the semiconductor wiring includes a wiring that transmits a write signal of information in a memory cell array. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the semiconductor wiring is a resistor element of a resistance value set arbitrary. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein the floating layer containing the impurities of the semiconductor wiring forms an island impurity layer in a charged up state by an arbitrary voltage being applied to a floating potential from an outside. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein the semiconductor wiring has impurities of a pentavalent element containing phosphorus (P) or arsenic (As) introduced. 
     
     
         11 . The semiconductor device according to  claim 1 , wherein the insulating layer has a thickness that suppresses a tunnel current by preventing an electric field generated by a signal applied to the semiconductor wiring from exceeding 5-6 MV/cm. 
     
     
         12 . The semiconductor device according to  claim 1 , wherein the semiconductor wiring is used in combination with a metal wiring when a first circuit is connected to a second circuit.