US2020184068A1PendingUtilityA1

Device such as a connected object provided with means for checking the execution of a program executed by the device

Assignee: IDEMIA IDENTITY & SECURITY FRANCEPriority: Dec 6, 2018Filed: Dec 3, 2019Published: Jun 11, 2020
Est. expiryDec 6, 2038(~12.4 yrs left)· nominal 20-yr term from priority
G06F 9/4418G06F 9/3877G06F 9/485G06F 9/3836G06F 21/52G06F 2221/033G01R 31/31713G01R 31/31705G06F 21/566G06F 21/64
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Claims

Abstract

The present invention relates to a device ( 1 ) such as a connected object comprising a first electronic circuit ( 2 ) comprising: a first processing unit ( 6 ) for executing a program, a first memory ( 8 ) for memorizing data during the execution of the program, a debug port ( 10 ) dedicated to checking the execution of the program from outside the first circuit, a second electronic circuit ( 4 ) connected to the debug port ( 10 ), comprising: a second memory ( 14 ) memorizing reference data related to the program, a second processing unit ( 12 ) for implementing the following steps automatically and autonomously via the debug port ( 10 ): checking the integrity of the data memorized by the first memory ( 8 ) and/or the compliance of the program's execution by the first processing unit ( 6 ) with a reference execution, assisted by the reference data.

Claims

exact text as granted — not AI-modified
1 . A device ( 1 ) such as a connected object comprising a first electronic circuit ( 2 ) comprising:
 a first processing unit ( 6 ) configured to execute a program,   a first memory ( 8 ) configured to memorize data from the program or manipulated by the program during its execution,   a debug port ( 10 ) dedicated to checking the execution of the program from outside the first circuit, the device ( 1 ) further comprising a second electronic circuit ( 4 ) connected to the debug port ( 10 ), the second electronic circuit ( 4 ) comprising:   a second memory ( 14 ) memorizing reference data related to the program,   a second processing unit ( 12 ) configured to implement the following steps automatically and autonomously via the debug port ( 10 ): checking the integrity of the data memorized by the first memory ( 8 ) and/or the compliance of the program's execution by the first processing unit ( 6 ) with a reference execution, assisted by the reference data.   
     
     
         2 . A device ( 1 ) according to  claim 1 , wherein the steps implemented automatically and autonomously by the second processing unit further comprise a program suspension command, the integrity check and/or compliance step being implemented while the program is suspended. 
     
     
         3 . A device ( 1 ) according to  claim 2 , wherein the suspension command comprises the placement of a stop point at a predetermined location in the program, so as to suspend the program at the predetermined location, or the placement of an observation point on a variable of the program, so as to suspend the program when the variable is modified. 
     
     
         4 . A device according to  claim 3 , wherein the steps implemented automatically and autonomously by the second processing unit ( 12 ) comprise a step consisting of verifying whether a condition independent of the way in which the program is being executed has been met, such as verifying whether a predetermined period of time has elapsed since a previous start of the program, a previous resumption of the program, or a previous powering-on of the device ( 1 ), the suspension command step being implemented when the condition is met. 
     
     
         5 . A device ( 1 ) according to  claim 1 , wherein the steps implemented automatically and autonomously by the second processing unit ( 12 ) comprise the command for the first processing unit ( 6 ) to resume the program when the program or the data manipulated by the program was not revealed to have been compromised during the check step, and/or to permanently shut down the program when the program or the data manipulated by the program was revealed to have been compromised during the check step. 
     
     
         6 . A device ( 1 ) according to  claim 2 , wherein the steps implemented automatically and autonomously by the second processing unit ( 12 ) comprise the generating of a report indicating whether the program or the data manipulated by the program was revealed to have been compromised during the check step. 
     
     
         7 . A device ( 1 ) according to  claim 6 , comprising a communication interface ( 18 ) with the world outside the device ( 1 ) configured to transmit the generated report to a remote server ( 3 ) away from the device ( 1 ). 
     
     
         8 . A device ( 1 ) according to  claim 7 , wherein the steps implemented automatically and autonomously by the second processing unit ( 12 ) comprise a command to transmit the report to the server ( 3 ) via the communication interface ( 18 ) while the program is suspended. 
     
     
         9 . A device ( 1 ) according to  claim 7  wherein the communication interface ( 18 ) is configured to transmit the report to the server ( 3 ) without the report going through the first electronic circuit ( 2 ). 
     
     
         10 . A device ( 1 ) according to  claim 7 , wherein the communication interface ( 18 ) is part of the first electronic circuit ( 2 ). 
     
     
         11 . A device ( 1 ) according to  claim 10 , wherein the steps implemented automatically and autonomously by the second processing unit ( 12 ) comprise the commanding, via the debug port ( 10 ), that the report be written in an exchange zone allocated in the first memory ( 8 ), so that the report can thereafter be relayed to the server ( 3 ) via the communication interface ( 18 ). 
     
     
         12 . A device ( 1 ) according to  claim 10 , wherein the first electronic circuit ( 2 ) comprises a second port ( 20 ) distinct from the debug port ( 10 ), and wherein the steps implemented automatically and autonomously by the second processing unit ( 12 ) comprise the commanding that the report be transmitted to the communication interface ( 18 ) via the second port ( 20 ), so that the error message can thereafter be relayed to the server via the communication interface ( 18 ). 
     
     
         13 . A device ( 1 ) according to  claim 1 , wherein the reference data indicate a sequence of events that occur in a predetermined order during the reference execution of the program, and wherein the compliance check of the program's execution against a reference execution comprises a comparison between the predetermined order and an order in which the events occur during the execution of the program by the first processing unit ( 6 ). 
     
     
         14 . A method implemented in a device ( 1 ) such as a connected object, the device ( 1 ) comprising:
 a first electronic circuit ( 2 ) comprising a first processing unit ( 6 ) configured to execute a program, a first memory ( 8 ) configured to memorize data from the program or manipulated by the program during its execution, and a debug port ( 10 ) dedicated to checking the execution of the program from outside the first circuit,   a second electronic circuit ( 4 ) connected to the debug port ( 10 ) and comprising a second memory ( 14 ) memorizing reference data related to the program,   
       the method comprising the following steps implemented by a second processing unit ( 12 ) of the second electronic circuit ( 4 ), automatically and autonomously via the debug port ( 10 ): checking the integrity of the data memorized by the first memory ( 8 ) and/or the compliance of the program's execution by the first processing unit ( 6 ) with a reference execution, assisted by the reference data. 
     
     
         15 . A computer program product comprising program code instructions for executing the steps of the method according to  claim 14 , when that method is executed by a processing unit ( 12 ).

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