US2020140262A1PendingUtilityA1

Semiconductor device package and method of manufacturing the same

Assignee: ADVANCED SEMICONDUCTOR ENGPriority: Oct 27, 2015Filed: Jan 6, 2020Published: May 7, 2020
Est. expiryOct 27, 2035(~9.3 yrs left)· nominal 20-yr term from priority
B81B 2201/0292B81C 1/00317B81B 7/0067B81C 2203/0109H01L 2224/48137H01L 2924/16151H01L 31/0203H01L 2224/48091H01L 2924/16195H01L 2224/48227H10W 90/754H10W 90/753H10F 77/50
64
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor device package includes a carrier; a sensor element disposed on or within the carrier; a cover disposed above the carrier and comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface; and a light transmissive element covering the penetrating hole, wherein the sensor element senses or detects light passing through the light transmissive element.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device package, comprising:
 a carrier;   a sensor element disposed on or within the carrier; and   a cover comprising a top surface, a bottom surface and an inner sidewall,   wherein the inner sidewall defines a penetrating hole extending from the top surface to the bottom surface, the penetrating hole exposes the sensor element, the inner sidewall comprises a titled inner sidewall, and   wherein the inner sidewall is a light reflection surface.   
     
     
         2 . The semiconductor device package according to  claim 1 , wherein the tilted inner sidewall is tilted at an angle of between about 10° to less than 90°, relative to the top surface. 
     
     
         3 . The semiconductor device package according to  claim 1 , wherein the tilted inner sidewall is tilted at an angle of between about 15° to about 80°, relative to the top surface. 
     
     
         4 . The semiconductor device package according to  claim 1 , wherein the cover comprises a liquid crystal polymer, an epoxy resin, a polyphthalamide (PPA) resin, a metal, or a combination thereof. 
     
     
         5 . The semiconductor device package according to  claim 1 , further comprising a light transmissive element covering the penetrating hole. 
     
     
         6 . The semiconductor device package according to  claim 1 , wherein the receiving area of the sensor element does not overlap the cover in vertical projection direction. 
     
     
         7 . The semiconductor device package according to  claim 5 , wherein the cover further comprises a portion protruding from the top surface of the cover, and the protruding portion comprises an inner sidewall defining a space to accommodate the light transmissive element. 
     
     
         8 . The semiconductor device package according to  claim 1 , further comprising a wire wherein the wire electrically connects the sensor element to the carrier or an electronic device disclosed on or within the carrier and wherein the wire overlaps the cover in vertical projection direction. 
     
     
         9 . The semiconductor device package according to  claim 1 , wherein the inner sidewall comprises an upper portion and a lower portion connected to the upper portion, and wherein the upper portion is substantially perpendicular to the top surface of the cover. 
     
     
         10 . A semiconductor device package, comprising:
 a carrier;   a sensor element disposed on or within the carrier; and   a cover comprising a top surface, a bottom surface, and an inner sidewall,   wherein the inner sidewall defines a penetrating hole extending from the top surface to the bottom surface, the penetrating hole exposes the sensor element, and a dimension of the penetrating hole at the bottom surface is larger than a dimension of the penetrating hole at the top surface, and   wherein the inner sidewall is a light reflection surface.   
     
     
         11 . The semiconductor device package according to  claim 10 , wherein the inner sidewall comprises a titled inner sidewall and wherein the tilted inner sidewall is tilted at an angle of between about 10° to less than 90°, relative to the top surface. 
     
     
         12 . The semiconductor device package according to  claim 11 , wherein the tilted inner sidewall is tilted at an angle of between about 15° to about 80°, relative to the top surface. 
     
     
         13 . The semiconductor device package according to  claim 10 , wherein the inner sidewall is configured to reduce or minimize undesired parasitic light from entering the sensor element. 
     
     
         14 . The semiconductor device package according to  claim 10 , wherein the inner sidewall directs undesired parasitic light away from the sensor element by reflection. 
     
     
         15 . The semiconductor device package according to  claim 10 , wherein the sensor element includes a receiving area for receiving light and the dimension of the penetrating hole at the top surface is larger than a dimension of the receiving area of the sensor element. 
     
     
         16 . The semiconductor device package according to  claim 10 , wherein the receiving area of the sensor element does not overlap the cover in vertical projection direction. 
     
     
         17 . A semiconductor device package, comprising:
 a carrier;   a sensor element for receiving light disposed on or within the carrier; and   a cover comprising a top surface, a bottom surface, and an inner sidewall,   wherein the inner sidewall defines a penetrating hole extending from the top surface to the bottom surface, the penetrating hole exposes the sensor element, the inner sidewall comprises a titled inner sidewall, and   wherein the inner sidewall is configure to direct undesired parasitic light away from the sensor element.   
     
     
         18 . The semiconductor device package according to  claim 17 , wherein the tilted inner sidewall is tilted at an angle of between about 10° to less than 90°, relative to the top surface. 
     
     
         19 . The semiconductor device package according to  claim 17 , further comprising a wire wherein the wire electrically connects the sensor element to the carrier or an electronic device disclosed on or within the carrier and wherein the wire overlaps the cover in vertical projection direction. 
     
     
         20 . The semiconductor device package according to  claim 17 , wherein the inner sidewall comprises an upper portion and a lower portion connected to the upper portion, and wherein the upper portion is substantially perpendicular to the top surface of the cover.

Join the waitlist — get patent alerts

Track US2020140262A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.