US2020133578A1PendingUtilityA1
Technologies for issuing commands on selected memory devices
Est. expiryMar 31, 2037(~10.7 yrs left)· nominal 20-yr term from priority
G06F 3/0656G06F 13/1668G11C 16/20G06F 3/0679G06F 3/064G06F 3/0688G11C 16/08G06F 3/0604G06F 3/0659G11C 8/12
57
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
Technologies for issuing commands on selected memory devices includes an apparatus that includes a data storage controller and multiple non-volatile, write in place, byte or block addressable memory devices. The memory devices are arranged in one or more ranks, and the memory devices in each rank are connected to a same communication channel. The data storage controller is to select a subgroup of the plurality of the memory devices in a rank without modifying an identifier of each memory device, and issue a command to operate on data of the selected subgroup.
Claims
exact text as granted — not AI-modified1 - 25 . (canceled)
26 . An apparatus comprising:
a data storage controller to:
select at least a portion of memory devices in a rank based on one of at least two identifiers assigned to all memory devices of the selected at least portion of memory devices, wherein the memory devices in the rank include non-volatile, byte or block addressable memory connected to a same communication channel; and
issue a command to access the selected at least portion of memory devices.
27 . The apparatus of claim 26 , comprising the at least two identifiers to include:
a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a refresh command or to a write command; and a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command.
28 . The apparatus of claim 27 , the selected at least portion of memory devices comprises all the memory devices in the rank, all the memory devices selected based on the first identifier.
29 . The apparatus of claim 28 , the command to access all the memory devices in the rank comprises a refresh command that includes the first identifier.
30 . The apparatus of claim 27 , the selected at least portion of memory devices comprises a subgroup of memory devices in the rank, the subgroup selected based on the second identifier, the subgroup is more than one and less than all of the memory devices in the rank.
31 . The apparatus of claim 30 , the command to access the subgroup of memory devices in the rank comprises a read command that includes the second identifier.
32 . The apparatus of claim 26 , comprising the at least two identifiers to include:
a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a refresh command or to a write command; a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a write command; and a third identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command.
33 . The apparatus of claim 32 , the selected at least portion of memory devices comprises all the memory devices in the rank, all the memory devices selected based on the first identifier.
34 . The apparatus of claim 33 , the command to access all the memory devices in the rank comprises a refresh command that includes the first identifier.
35 . The apparatus of claim 32 , the selected at least portion of memory devices comprises a subgroup of memory devices in the rank, the subgroup selected based on the second identifier, the subgroup is more than two and less than all of the memory devices in the rank.
36 . The apparatus of claim 35 , the command to access the subgroup of memory devices in the rank comprises a write command that includes the second identifier.
37 . The apparatus of claim 32 , the selected at least portion of memory devices comprises a second subgroup of memory devices in the rank, the second subgroup selected based on the third identifier, the second subgroup of memory devices is more than one and equal to N−2 of the memory devices in the rank, where “N” represents a total number of memory devices in the rank.
38 . The apparatus of claim 37 , the command to access the second subgroup of memory devices in the rank comprises a read command that includes the third identifier.
39 . The apparatus of claim 26 , comprising the at least two identifiers assigned to the memory devices in the rank following initialization of the memory devices in the rank.
40 . The apparatus of claim 26 , the non-volatile, byte or block addressable memory comprises phase change memory that uses chalcogenide phase change material, ferroelectric polymer memory, ferroelectric random-access memory (FeTRAM), nanowire-based memory, phase change memory that incorporates memristors, magnetorresistive random-access memory (MRAM), or spin transfer torque (STT)-MRAM.
41 . At least one non-transistory machine readable medium comprising a plurality of instructions that in response to being executed by a data storage controller, cause the data storage controller to:
select at least a portion of memory devices in a rank based on one of at least two identifiers assigned to all memory devices of the selected at least portion of memory devices, wherein the memory devices in the rank include non-volatile, byte or block addressable memory connected to a same communication channel; and issue a command to access the selected at least portion of memory devices.
42 . The at least one non-transitory machine readable medium of claim 41 , comprising the at least two identifiers to include:
a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a refresh command or to a write command; and a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command.
43 . The at least one non-transitory machine readable medium of claim 42 , the selected at least portion of memory devices comprises all the memory devices in the rank, all the memory devices selected based on the first identifier.
44 . The at least one non-transitory machine readable medium of claim 42 , the selected at least portion of memory devices comprises a subgroup of memory devices in the rank, the subgroup selected based on the second identifier, the subgroup is more than one and less than all of the memory devices in the rank.
45 . The at least one non-transitory machine readable medium of claim 41 , comprising the at least two identifiers to include:
a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a refresh command or to a write command; a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a write command; and a third identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command.
46 . The at least one non-transitory machine readable medium of claim 45 , the selected at least portion of memory devices comprises all the memory devices in the rank, all the memory devices selected based on the first identifier.
47 . The at least one non-transitory machine readable medium of claim 45 , the selected at least portion of memory devices comprises a subgroup of memory devices in the rank, the subgroup selected based on the second identifier, the subgroup is more than two and less than all of the memory devices in the rank.
48 . The at least one non-transitory machine readable medium of claim 45 , the selected at least portion of memory devices comprises a second subgroup of memory devices in the rank, the second subgroup selected based on the third identifier, the second subgroup of memory devices is more than one and equal to N−2 of the memory devices in the rank, where “N” represents a total number of memory devices in the rank.
49 . The at least one non-transitory machine readable medium of claim 41 , comprising the at least two identifiers assigned to the memory devices in the rank following initialization of the memory devices in the rank.
50 . A method comprising:
selecting, by a data storage controller, at least a portion of memory devices in a rank based on one of at least two identifiers assigned to all memory devices of the selected at least portion of memory devices, wherein the memory devices in the rank include non-volatile, byte or block addressable memory connected to a same communication channel; and issuing a command to access the selected at least portion of memory devices.
51 . The method of claim 50 , comprising the at least two identifiers to include:
a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a refresh command or to a write command; and a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command.
52 . The method of claim 51 , the selected at least portion of memory devices comprises all the memory devices in the rank, all the memory devices selected based on the first identifier.
53 . The method of claim 51 , the selected at least portion of memory devices comprises a subgroup of memory devices in the rank, the subgroup selected based on the second identifier, the subgroup is more than one and less than all of the memory devices in the rank.
54 . The method of claim 50 , comprising the at least two identifiers to include:
a first identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a refresh command or to a write command; a second identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a write command; and a third identifier to indicate that the selected at least portion of memory devices are to be accessed responsive to a read command.
55 . The method of claim 54 , the selected at least portion of memory devices comprises all the memory devices in the rank, all the memory devices selected based on the first identifier.
56 . The method of claim 54 , the selected at least portion of memory devices comprises a subgroup of memory devices in the rank, the subgroup selected based on the second identifier, the subgroup is more than two and less than all of the memory devices in the rank.
57 . The method of claim 54 , the selected at least portion of memory devices comprises a second subgroup of memory devices in the rank, the second subgroup selected based on the third identifier, the second subgroup of memory devices is more than one and equal to N−2 of the memory devices in the rank, where “N” represents a total number of memory devices in the rank.
58 . The method of claim 50 , comprising:
assigning the at least two identifiers to the memory devices in the rank following initialization of the memory devices in the rank.Join the waitlist — get patent alerts
Track US2020133578A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.