Method and circuit enabling ferroelectric memory to be fixed to a stable state

Abstract

A system includes a ferroelectric random access memory (FRAM) array having one or more memory elements. A cycle controller cycles data to be fixed in a subset of the one or more memory elements by reading or writing the data a predetermined number of times to fix the data to a non-volatile stable state.

What is claimed is: 
     
         1 . A circuit comprising:
 a ferroelectric random access memory (FRAM) array having one or more memory elements;   a cycle controller to cycle data to be fixed in a subset of the one or more memory elements by reading or writing the data a predetermined number of times to fix the data to a non-volatile stable state; and   a heater controlled by the cycle controller to heat the FRAM array to a predetermined temperature to facilitate fixing the data in less cycles to read or write the data the predetermined number of times.   
     
     
         2 . The circuit of  claim 1 , wherein the heater is a resistive heating element that applies heat within a package that houses the FRAM array. 
     
     
         3 . The circuit of  claim 1 , wherein the heater is a resistive heating element that resides on an integrated circuit die that provides heat to one or more of the memory elements. 
     
     
         4 . The circuit of  claim 1 , wherein the heater supplies heat that is above an ambient temperature of the FRAM array. 
     
     
         5 . The circuit of  claim 4 , wherein the temperature above the ambient temperature of the FRAM array is within a range of about 85 degrees Celsius to about 200 degrees Celsius. 
     
     
         6 . The circuit of  claim 1 , wherein the cycle controller further comprises a cycle adjuster to cycle the data stored in the subset of the one or more memory elements by reading or writing the data in a range of about 5 cycles to about 10,000 cycles. 
     
     
         7 . The circuit of  claim 1 , wherein the cycle controller further comprises a voltage adjuster to set a programming read or write voltage applied to the one or more memory elements to an elevated voltage about ten percent above a nominal voltage setting and less than a breakdown voltage setting for the one or more memory elements to facilitate fixing the data in less cycles to read or write the data the predetermined number of times. 
     
     
         8 . A method comprising:
 applying heat, via a controller, to a ferroelectric random access memory (FRAM) array having one or more memory elements;   increasing an operating voltage above a nominal voltage setting, via the controller, to read or write to the one or more memory cells; and   cycling the data, via the controller, to be fixed in the subset of the one or more memory elements by reading the data a predetermined number of times to fix the data to a non-volatile stable state.   
     
     
         9 . The method of  claim 8 , further comprising cycling the data stored in the subset of the one or more memory elements by reading the data in a range of about 5 cycles to about 10,000 cycles. 
     
     
         10 . The method of  claim 9 , further comprising increasing the operating voltage applied to the one or more memory cells to an elevated voltage about ten percent above the nominal voltage setting and less than a breakdown voltage setting for the one or more memory elements to facilitate fixing the data in fewer cycles to read the data the predetermined number of times.