Methods and apparatus to measure a transfer function of a control system

Abstract

Methods and apparatus to measure a transfer function of a control system are disclosed. An example method includes receiving a first signal from the power supply at a first point in the control loop at a digital signal processor, instructing the digital signal processor to add a reference signal having a predetermined frequency and a predetermined amplitude to the first signal to generate a combined signal in the digital signal processor, using the combined signal to generate a control signal for the power stage, sampling the control signal at a second point around the control loop in the digital signal processor to generate a sampled signal, comparing the sampled signal to the reference signal to determine a transfer function of the digital power supply, and displaying the transfer function on a user interface.

What is claimed is: 
     
         1 . A device comprising:
 an input configured to receive a feedback signal from a power stage circuit;   an output configured to provide a control signal for controlling the power stage circuit;   a digital compensator coupled between the input and the output, and configured to form a loop with the power stage circuit when the power stage circuit is coupled to the input and the output; and   a processor configured to:
 provide an injection signal having a non-zero frequency to a first node of the loop; 
 receiving a sampled signal at a second node of the loop; and 
 determining a transfer function of the loop based on a comparison between the injection signal and the sampled signal. 
   
     
     
         2 . The device of  claim 1 , wherein the first node is inside the digital compensator. 
     
     
         3 . The device of  claim 1 , wherein the first node is outside the digital compensator. 
     
     
         4 . The device of  claim 1 , wherein the second node is inside the digital compensator. 
     
     
         5 . The device of  claim 1 , wherein the second node is outside the digital compensator. 
     
     
         6 . The device of  claim 1 , further comprising:
 a digital signal processor (DSP) implementing the digital compensator and the processor.   
     
     
         7 . The device of  claim 1 , wherein the DSP includes:
 an analog-to-digital converter (ADC) coupled to the input for converting the feedback signal to a digital feedback signal;   a digital adder configured to generate a digital error signal based on the digital feedback signal and a reference signal;   the digital compensator configured to generate a digital control signal based on the digital error signal; and   a pulse width modulator (PWM) coupled to the output for providing the control signal based on the digital control signal.   
     
     
         8 . The device of  claim 7 , wherein the DSP includes a second digital adder configured to add the injection signal to the digital error signal before the digital compensator generates the digital control signal. 
     
     
         9 . The device of  claim 7 , wherein the DSP includes a second digital adder configured to add the injection signal to the digital control signal before the PWM provide the control signal. 
     
     
         10 . The device of  claim 1 , wherein the injection signal includes a digitized sinusoidal signal. 
     
     
         11 . A device comprising:
 an input configured to receive a feedback signal from a power stage circuit;   an output configured to provide a control signal for controlling the power stage circuit;   a digital signal processor (DSP) coupled between the input and the output, and configured to form a loop with the power stage circuit when the power stage circuit is coupled to the input and the output, the DSP is configured to:
 provide an injection signal having a non-zero frequency to a first node of the loop; 
 receiving a sampled signal at a second node of the loop; and 
 determining a transfer function of the loop based on a comparison between the injection signal and the sampled signal. 
   
     
     
         12 . The device of  claim 11 , wherein the DSP includes:
 an analog-to-digital converter (ADC) configured to convert the feedback signal to a digital feedback signal;   a digital adder configured to generate a digital error signal based on the digital feedback signal and a reference signal;   a digital compensator configured to generate a digital control signal based on the digital error signal; and   a pulse width modulator (PWM) configured to provide the control signal based on the digital control signal.   
     
     
         13 . The device of  claim 12 , wherein the DSP includes a second digital adder configured to add the injection signal to the digital error signal before the digital compensator generates the digital control signal. 
     
     
         14 . The device of  claim 12 , wherein the DSP includes a second digital adder configured to add the injection signal to the digital control signal before the PWM provide the control signal. 
     
     
         15 . The device of  claim 11 , wherein the injection signal includes a digitized sinusoidal signal. 
     
     
         16 . A system comprising:
 a telecommunications system;   a power stage circuit having an output terminal configured to provide an output voltage to the telecommunications system, and an input terminal configured to receive a control signal for regulating the output voltage;   a digital signal processor (DSP) having a first terminal coupled to the input terminal for providing the control signal to the power stage circuit, a second terminal coupled to the output terminal for receiving a feedback signal representative of the output voltage of the power stage circuit, the DSP forming a loop with the power stage circuit, and configured to:
 provide an injection signal having a non-zero frequency to a first node of the loop; 
 receiving a sampled signal at a second node of the loop; and 
 determining a transfer function of the loop based on a comparison between the injection signal and the sampled signal. 
   
     
     
         17 . The system of  claim 16 , wherein the DSP includes:
 an analog-to-digital converter (ADC) configured to convert the feedback signal to a digital feedback signal;   a digital adder configured to generate a digital error signal based on the digital feedback signal and a reference signal;   a digital compensator configured to generate a digital control signal based on the digital error signal; and   a pulse width modulator (PWM) configured to provide the control signal based on the digital control signal.   
     
     
         18 . The system of  claim 17 , wherein the DSP includes a second digital adder configured to add the injection signal to the digital error signal before the digital compensator generates the digital control signal. 
     
     
         19 . The system of  claim 17 , wherein the DSP includes a second digital adder configured to add the injection signal to the digital control signal before the PWM provide the control signal. 
     
     
         20 . The system of  claim 16 , wherein the injection signal includes a digitized sinusoidal signal.