Integrated piezoelectric microelectromechanical ultrasound transducer (pmut) on integrated circuit (ic) for fingerprint sensing

Abstract

Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.

What is claimed is: 
     
         1 . A microelectromechanical systems (MEMS) device, comprising:
 a MEMS ultrasound transducer (MUT) structure and a piezoelectric material disposed within the MEMS device comprising a piezoelectric MUT (PMUT) array of a fingerprint sensor adapted to sense a characteristic of a fingerprint placed adjacent to the MUT structure;   a stand-off formed on the piezoelectric material;   a first metal conductive layer disposed on the piezoelectric material; and   a plurality of metal electrodes configured to form electrical connections between the first metal conductive layer and a complementary metal oxide semiconductor (CMOS) structure, wherein the pMUT structure and the CMOS structure are vertically stacked, and wherein the MUT structure is bonded to the CMOS structure at the standoff via at least one of a eutectic bonding layer, a compression bond, or a conductive epoxy.   
     
     
         2 . The MEMS device of  claim 1 , further comprising:
 a second metal conductive layer disposed on the piezoelectric material and opposite the first metal conductive layer.   
     
     
         3 . The MEMS device of  claim 2 , further comprising:
 a second plurality of electrodes configured to form a second set of electrical connections between the second metal conductive layer and the CMOS structure.   
     
     
         4 . The MEMS device of  claim 2 , further comprising:
 a silicon structural substrate disposed on the first metal conductive layer opposite the second metal conductive layer.   
     
     
         5 . The MEMS device of  claim 4 , further comprising:
 a seed layer disposed between the silicon structural substrate and the first metal conductive layer.   
     
     
         6 . The MEMS device of  claim 2 , wherein at least one of the first metal conductive layer or the second metal conductive layer comprises at least one material comprising at least one of molybdenum or aluminum. 
     
     
         7 . The MEMS device of  claim 1 , wherein the stand-off comprises a silicon dioxide layer deposited over the piezoelectric material. 
     
     
         8 . The MEMS device of  claim 1 , wherein the eutectic bonding layer comprises an aluminum-germanium eutectic bonding layer. 
     
     
         9 . The MEMS device of  claim 1 , wherein the MUT structure is electrically coupled to the CMOS structure at the standoff. 
     
     
         10 . The MEMS device of  claim 1 , wherein the piezoelectric material comprises at least one of aluminum nitride, lead zirconate titanate (PZT), zinc oxide, polyvinylidene difluoride (PVDF), or lithium niobate (LiNbO3). 
     
     
         11 . A method, comprising:
 depositing and patterning a piezoelectric layer on the MEMS device wafer;   forming a plurality of stand-offs on the piezoelectric material;   forming a plurality of openings in the piezoelectric layer to expose a first conductive material layer under the piezoelectric layer and to expose at least one bottom electrode;   depositing and patterning a second conductive material layer over the piezoelectric layer to establish an electrical connection between the at least one bottom electrode and the second conductive material layer; and   bonding a complementary metal oxide semiconductor (CMOS) structure to the MEMS device wafer at a plurality of electrodes including the bottom electrode associated with the plurality of stand-offs.   
     
     
         12 . The method of  claim 11 , wherein the depositing and patterning the piezoelectric layer comprises depositing and patterning at least one of aluminum nitride, lead zirconate titanate (PZT), zinc oxide, polyvinylidene difluoride (PVDF), lithium niobate (LiNbO3). 
     
     
         13 . The method of  claim 11 , wherein the forming the plurality of openings in the piezoelectric layer and the depositing and patterning the second conductive material layer over the piezoelectric layer comprises forming at least one bottom electrode electrically coupled to at least one top electrode via the piezoelectric layer. 
     
     
         14 . The method of  claim 11 , wherein the forming the plurality of stand-offs on the piezoelectric material stand-off comprises forming the plurality of stand-offs of a silicon dioxide layer deposited over the piezoelectric material. 
     
     
         15 . The method of  claim 11 , wherein the bonding the CMOS structure to the MEMS device wafer comprises bonding the CMOS structure to the MEMS device wafer via at least one of a eutectic bonding layer, a compression bond, a conductive epoxy. 
     
     
         16 . The method of  claim 11 , wherein the bonding the CMOS structure to the MEMS device wafer via the at least one of the eutectic bonding layer, the compression bond, or the conductive epoxy comprises bonding the CMOS structure to the MEMS device wafer via the eutectic bonding layer comprising an aluminum-germanium eutectic bonding layer.