US2020103949A1PendingUtilityA1

Using Power Fingerprinting (PFP) to Monitor the Integrity and Enhance Security of Computer Based Systems

Individually held — no corporate assignee on recordPriority: Nov 3, 2010Filed: Aug 22, 2019Published: Apr 2, 2020
Est. expiryNov 3, 2030(~4.3 yrs left)· nominal 20-yr term from priority
H04L 9/3247G06F 21/755G06F 21/52G06F 2221/033G06F 2221/034G06F 11/3093G06F 11/3062G06F 1/28G06F 21/56G06F 1/3206G06F 11/22G06F 11/30G06F 21/00
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Claims

Abstract

Procedures are described for enhancing target system execution integrity determined by power fingerprinting (PFP): by integrating PFP into the detection phase of comprehensive defense-in-depth security; by deploying a network of PFP enabled nodes executing untrusted devices with predefined inputs forcing a specific state sequence and specific software execution; by embedding module identification information into synchronization signaling; by combining signals from different board elements; by using malware signatures to enhance PFP performance; by automatic characterization and signature extraction; by providing secure signature updates; by protecting against side-channel attacks; performing real-time integrity assessment in embedded platform by monitoring their dynamic power consumption and comparing it against signatures from trusted code, including pre-characterizing power consumption of the platform by concentrating on trace sections carrying the most information about the internal execution status; by using PFP from sequence of bit transitions to detect deviations from authorized execution of software in a digital processor.

Claims

exact text as granted — not AI-modified
1 . A method, comprising:
 generating a plurality of inputs, each input from the plurality of inputs to force a first electronic device into an execution path from a plurality of execution paths when the first electronic device operates in response to that input;   observing, using a sensor and for each input from the plurality of inputs, side-channel response of the first electronic device when the first electronic device operates in response to that input, to produce a side-channel signature; and   sending, to a second electronic device, a representation of the plurality of inputs to test the second electronic device using the plurality of inputs and based on the side-channel signature.   
     
     
         2 . The method of  claim 1 , wherein:
 the plurality of inputs is a first plurality of inputs,   the plurality of execution paths is a first plurality of execution paths, and   generating the first plurality of inputs includes iteratively applying to the first electronic device each input from a second plurality of inputs to generate a second plurality of execution paths that includes a first execution path from the first plurality of execution paths, a first input from the second plurality of inputs that resulted in the first execution path being included in the first plurality of inputs.   
     
     
         3 . The method of  claim 1 , wherein generating the plurality of inputs includes iteratively applying at least one of a random search algorithm, a hill-climbing algorithm, a genetic algorithm or a heuristic approach. 
     
     
         4 . The method of  claim 1 , wherein generating the plurality of inputs is performed by a software scaffold operating on the first electronic device. 
     
     
         5 . The method of  claim 1 , wherein a type of the first electronic device corresponds to a type of the second electronic device. 
     
     
         6 . The method of  claim 1 , wherein sending includes sending the representation of the plurality of inputs such that the second electronic device is tested based on at least one input from the plurality of inputs to produce a side-channel response that is compared to at least a portion of the side-channel signature. 
     
     
         7 . The method of  claim 1 , wherein each input from the plurality of inputs results in a state sequence from a plurality of state sequences at a first electronic device when the first electronic device operates in response to that input, each state sequence from the plurality of state sequences being associated with an execution path from a plurality of execution paths. 
     
     
         8 . The method of  claim 1 , wherein:
 the plurality of inputs include a first subset of inputs and a second subset of inputs different from the first subset of inputs,   the plurality of execution paths include a first subset of execution paths and a second subset of execution paths different from the first subset of execution paths, the first subset of execution paths is associated with the first subset of inputs, the second subset of execution paths is associated with the second subset of inputs,   the first subset of inputs being based on manual input,   the second subset of input not being based on manual input.   
     
     
         9 . The method of  claim 1 , wherein the generating is performed, at least in part, automatically without manual input. 
     
     
         10 . A system, comprising:
 a processor configured to generate a plurality of inputs, each input from the plurality of inputs to force a first electronic device into an execution path from a plurality of execution paths when the first electronic device operates in response to that input; and   a sensor configured to observe, for each input from the plurality of inputs, side-channel response of the first electronic device when the first electronic device operates in response to that input, to produce a side-channel signature,   the processor configured to send, to a second electronic device, a representation of the plurality of inputs to test the second electronic device using the plurality of inputs and based on the side-channel signature.   
     
     
         11 . The system of  claim 10 , wherein:
 the plurality of inputs is a first plurality of inputs,   the plurality of execution paths is a first plurality of execution paths, and   the processor is configured to generate the first plurality of inputs by iteratively applying to the first electronic device each input from a second plurality of inputs to generate a second plurality of execution paths that includes a first execution path from the first plurality of execution paths, a first input from the second plurality of inputs that resulted in the first execution path being included in the first plurality of inputs.   
     
     
         12 . The system of  claim 10 , wherein the processor is configured to generate the plurality of inputs by iteratively applying at least one of a random search algorithm, a hill-climbing algorithm, a genetic algorithm, or a heuristic approach. 
     
     
         13 . The system of  claim 10 , wherein:
 the processor is configured to generate the plurality of inputs via a software scaffold operating on the first electronic device.   
     
     
         14 . The system of  claim 10 , wherein a type of the first electronic device corresponds to a type of the second electronic device. 
     
     
         15 . The system of  claim 10 , wherein the processor is configured to send, to the second electronic device, the representation of the plurality of inputs and the side-channel signature such that the second electronic device is tested based on at least one input from the plurality of inputs to produce a side-channel response that is compared to at least a portion of the side-channel signature. 
     
     
         16 . The system of  claim 10 , wherein each input from the plurality of inputs results in a state sequence from a plurality of state sequences at a first electronic device when the first electronic device operates in response to that input, each state sequence from the plurality of state sequences being associated with an execution path from a plurality of execution paths. 
     
     
         17 . The system of  claim 10 , wherein:
 the plurality of inputs include a first subset of inputs and a second subset of inputs different from the first subset of inputs,   the plurality of execution paths include a first subset of execution paths and a second subset of execution paths different from the first subset of execution paths, the first subset of execution paths is associated with the first subset of inputs, the second subset of execution paths is associated with the second subset of inputs,   the first subset of inputs being based on manual input,   the second subset of input not being based on manual input.   
     
     
         18 . The system of  claim 10 , wherein the processor is configured to generate the plurality of inputs, at least in part, automatically without manual input. 
     
     
         19 . A system, comprising:
 a first processor configured to generate a plurality of inputs, each input from the plurality of inputs to force a first electronic device into an execution path from a plurality of execution paths when the first electronic device operates in response to that input;   a first sensor configured to observe, for each input from the plurality of inputs, side-channel response of the first electronic device when the first electronic device operates in response to that input, to produce a first side-channel signature;   a second sensor configured to observe, for at least one input from the plurality of inputs, side-channel response of the second electronic device when the second electronic device operates in response that at least one input; and   a second processor configured to compare the side-channel response with at least a portion of the side-channel signature to determine whether a deviation is present in the second electronic device relative to the first electronic device.   
     
     
         20 . The system of  claim 19 , wherein:
 the first processor and the first sensor are proximate the first electronic device, and the second processor and the second sensor are proximate the second electronic device.

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