Integrated circuit devices including fin shapes

Abstract

Integrated circuit devices are provided. An integrated circuit device includes a substrate having first and second fin-shaped Field Effect Transistor (FinFET) bodies protruding from the substrate. The first and second FinFET bodies have different respective first and second shapes in a first region and a second region, respectively, of the integrated circuit device.

What is claimed is: 
     
         1 . An integrated circuit device comprising:
 a substrate comprising a first area and a second area;   a first device isolation film on the first area;   a second device isolation film on the second area;   a plurality of first fin-shaped active areas spaced apart at a constant pitch in the first area, each of the plurality of first fin-shaped active areas comprising a first top portion protruding from the first device isolation film by a first distance in a direction; and   a plurality of second fin-shaped active areas spaced apart at variable pitches in the second area, each of the plurality of second fin-shaped active areas comprising a second top portion protruding from the second device isolation film in the direction by a second distance greater than the first distance.   
     
     
         2 . The integrated circuit device of  claim 1 , wherein the first top portion has a first width, and the second top portion has a second width narrower than the first width. 
     
     
         3 . The integrated circuit device of  claim 1 , wherein the first top portion comprises:
 a first lower section active area comprising a first inclined sidewall extending at a first inclination angle with respect to the direction;   a first middle section active area protruding from the first lower section active area in the direction and comprising a second inclined sidewall extending at a second inclination angle smaller than the first inclination angle with respect to the direction;   a first upper section active area protruding from the first middle section active area in the direction and comprising a third inclined sidewall extending at a third inclination angle greater than the second inclination angle with respect to the direction; and   a first tip active area protruding from the first upper section active area in the direction and comprising a first rounded outer surface.   
     
     
         4 . The integrated circuit device of  claim 3 , wherein the second top portion comprises:
 a second lower section active area comprising a fourth inclined sidewall extending at a fourth inclination angle greater than the first inclination angle with respect to the direction;   a second middle section active area protruding from the second lower section active area in the direction and comprising a sidewall extending at a fifth inclination angle smaller than the fourth inclination angle with respect to the direction, the second middle section active area comprising a first width narrower than a second width of the first middle section active area;   a second upper section active area protruding from the second middle section active area in the direction and comprising a fifth inclined side wall extending at a sixth inclination angle greater than the fifth inclination angle with respect to the direction; and   a second tip active area protruding from the second upper section active area in the direction and comprising a second rounded outer surface.   
     
     
         5 . The integrated circuit device of  claim 1 , wherein the first top portion comprises a first tip active area comprising a first rounded outer surface having a first curvature radius, and wherein the second top portion comprises a second tip active area comprising a second rounded outer surface having a second curvature radius that is equal to or smaller than the first curvature radius. 
     
     
         6 . The integrated circuit device of  claim 1 , wherein each of the plurality of first fin-shaped active areas comprises a first base portion having a first base side wall covered by the first device isolation film, the first base portion extending at a first base inclination angle with respect to the direction, and
 wherein the first top portion has a first top side wall extending at a first top inclination angle with respect to the direction, the first top inclination angle being different from the first base inclination angle.   
     
     
         7 . The integrated circuit device of  claim 6 , wherein the first top inclination angle is larger than the first base inclination angle. 
     
     
         8 . The integrated circuit device of  claim 1 , wherein each of the plurality of second fin-shaped active areas comprises a second base portion having a second base side wall covered by the second device isolation film, the second base portion extending at a second base inclination angle with respect to the direction, and
 wherein the second top portion has a second top side wall extending at a second top inclination angle with respect to the direction, the second top inclination angle being different from the second base inclination angle.   
     
     
         9 . The integrated circuit device of  claim 8 , wherein the second top inclination angle is larger than the second base inclination angle. 
     
     
         10 . The integrated circuit device of  claim 1 , wherein each of the plurality of first fin-shaped active areas comprises a first base portion covered by the first device isolation film, and a first inclination transition point between the first top portion and the first base portion. 
     
     
         11 . The integrated circuit device of  claim 1 , wherein each of the plurality of second fin-shaped active areas comprises a second base portion covered by the second device isolation film, and a second inclination transition point between the second top portion and the second base portion. 
     
     
         12 . An integrated circuit device comprising:
 a substrate comprising a non-memory area and a memory area;   first and second device isolation films on the non-memory and memory areas, respectively, of the substrate;   first and second gate lines on the first and second device isolation films, respectively;   a first fin-shaped active area protruding from the non-memory area in a direction, the first fin-shaped active area comprising:
 a first base portion comprising a sidewall covered by the first device isolation film; and 
 a first top portion protruding from the first base portion in the direction up to a first height from the first base portion, the first top portion covered by the first gate line; and 
   a second fin-shaped active area protruding from the memory area in the direction, the second fin-shaped active area comprising:
 a second base portion comprising a sidewall covered by the second device isolation film; and 
 a second top portion protruding from the second base portion in the direction up to a second height from the second base portion, the second top portion covered by the second gate line, the second height being higher than the first height. 
   
     
     
         13 . The integrated circuit device of  claim 12 , wherein the first top portion has a first width, and the second top portion has a second width narrower than the first width. 
     
     
         14 . The integrated circuit device of  claim 12 , wherein the first top portion comprises a first tip active area comprising a first rounded outer surface having a first curvature radius, and
 wherein the second top portion comprises a second tip active area comprising a second rounded outer surface having a second curvature radius shorter than the first curvature radius.   
     
     
         15 . The integrated circuit device of  claim 12 , wherein the first top portion comprises a first lower section active area comprising a first inclined sidewall extending at a first inclination angle with respect to the direction, and
 wherein the second top portion comprises a second lower section active area comprising a second inclined sidewall extending at a second inclination angle greater than the first inclination angle with respect to the direction.   
     
     
         16 . The integrated circuit device of  claim 15 , wherein the first top portion further comprises a first middle section active area protruding from the first lower section active area in the direction and comprising a third inclined sidewall extending at a third inclination angle smaller than the first inclination angle with respect to the direction, and
 wherein the second top portion further comprises a second middle section active area protruding from the second lower section active area in the direction and comprising a sidewall extending parallel to the direction.   
     
     
         17 . An integrated circuit device comprising:
 a substrate comprising a non-memory area and a memory area;   a first device isolation film on the non-memory area of the substrate;   a second device isolation film on the memory area of the substrate;   a plurality of first fin-shaped active areas spaced apart at a constant pitch in the non-memory area, at least one of the plurality of first fin-shaped active areas comprising a first top portion protruding from the first device isolation film by a first distance in a direction; and   a plurality of second fin-shaped active areas spaced apart at variable pitches in the memory area, at least one of the plurality of second fin-shaped active areas comprising a second top portion protruding from the second device isolation film in the direction by a second distance longer than the first distance, wherein a difference between the second distance and the first distance is in a range from about 1 to about 5 nanometers (nm).   
     
     
         18 . The integrated circuit device of  claim 17 , wherein the first top portion has a first width, and the second top portion has a second width narrower than the first width. 
     
     
         19 . The integrated circuit device of  claim 17 , wherein the first top portion has a first lower section active area having a first top side wall extending at a first top inclination angle with respect to the direction, the first top inclination angle being larger than zero degrees, and
 wherein the second top portion has a second lower section active area having a second top side wall extending at a second top inclination angle with respect to the direction, the second top inclination angle being greater than the first top inclination angle.   
     
     
         20 . The integrated circuit device of  claim 19 , wherein the first lower section active area has a first height, and the second lower section active area has a second height greater than the first height.