System on chip receiving supply voltage(s) via merged power rail, and mobile system including same

Abstract

A mobile system includes a SOC and PMIC. The SOC includes a first signal processing circuit and a second signal processing circuit, and generates a dynamic voltage scaling (DVS) control signal based on operating states of the first signal processing circuit and the second signal processing circuit. The PMIC generates a supply voltage whose magnitude is controlled in response to the DVS control signal, and provides the supply voltage to the first signal processing circuit and the second signal processing circuit through a single power rail.

What is claimed is: 
     
         1 . A system-on-chip (SoC) comprising:
 a first processing circuit configured to receive a power supply voltage via a power rail;   a second processing circuit configured to receive the power supply voltage via the power rail; and   a power control circuit configured to generate a dynamic voltage scaling control signal based on an operating state of the first processing circuit and an operating state of the second processing circuit,   wherein the first processing circuit is configured to provide power data (DATA) to an external device in response to the operating state of the first processing circuit and/or the operating state of the second processing circuit.   
     
     
         2 . The SoC of  claim 1 , wherein the operating state of the first processing circuit indicates whether the first processing circuit block is active or inactive, and
 the operating state of the second processing circuit indicates whether the second processing circuit block is active or inactive.   
     
     
         3 . The SoC of  claim 1 , wherein the first processing circuit is an application processor, and the second processing circuit is a modem. 
     
     
         4 . The SoC of  claim 1 , wherein the SoC includes only one power rail. 
     
     
         5 . The SoC of  claim 1 , wherein the power control circuit provides the dynamic voltage scaling control signal to the external device. 
     
     
         6 . The SoC of  claim 1 , wherein the dynamic voltage scaling control signal indicates a plurality of modes including:
 a first mode in which the first processing circuit and the second processing circuit are not active,   a second mode in which the first processing circuit is active and the second processing circuit is not active, and   a third mode in which the first processing circuit the second processing circuit are active.   
     
     
         7 . A mobile system comprising:
 a system-on-chip (SoC); and   a power management integrated circuit (PMIC) including:   an interface circuit configured to receive power data including level information of a merged power supply voltage from the SoC;   a plurality of registers configured to store at least a portion of the power data;   a comparator configured to compare more than two of output signals of the plurality of registers;   a selecting circuit configured to select and output one of an output signal of the comparator and the output signals of the plurality of registers in response to a dynamic voltage scaling (DVS) control signal provided from the SOC; and   a power converter configured to generate the merged power supply voltage having a level corresponding to the output signal of the selecting circuit.   
     
     
         8 . The mobile system of  claim 7 , wherein the power converter provides the merged power supply voltage to each of a plurality of circuit blocks within the SoC directly through a single power rail. 
     
     
         9 . The mobile system of  claim 8 , wherein the DVS control signal indicates whether each of the plurality of circuit blocks included in the SoC is active or inactive. 
     
     
         10 . The mobile system of  claim 7 , wherein the selecting circuit selects and outputs one signal of: (1) the signal corresponding to the highest voltage value, among at least two signals, output from the comparator and (2) the signals stored in the plurality of registers in response to the DVS control signal. 
     
     
         11 . A mobile system comprising:
 a system-on-chip (SoC); and   a power management integrated circuit (PMIC),   wherein the SoC further comprises:
 a first processing circuit configured to receive a power supply voltage via a power rail; 
 a second processing circuit configured to receive the power supply voltage via the power rail; and 
 a power control circuit configured to generate a dynamic voltage scaling control signal based on an operating state of the first processing circuit and an operating state of the second processing circuit, 
   wherein the first processing circuit is configured to provide power data (DATA) to an external device in response to the operating state of the first processing circuit and/or the operating state of the second processing circuit.   
     
     
         12 . The mobile system of  claim 11 , wherein the operating state of the first processing circuit indicates whether the first processing circuit is active or inactive, and
 the operating state of the second processing circuit indicates whether the second processing circuit is active or inactive.   
     
     
         13 . The mobile system of  claim 11 , wherein the first processing circuit is an application processor, and
 the second processing circuit is a modem.   
     
     
         14 . The mobile system of  claim 11 , wherein the SoC includes only one power rail. 
     
     
         15 . The mobile system of  claim 11 , wherein the power control circuit provides the dynamic voltage scaling control signal to the external device. 
     
     
         16 . The mobile system of  claim 11 , wherein the dynamic voltage scaling control signal indicates a plurality of modes including:
 a first mode in which the first processing circuit and the second processing circuit are not active,   a second mode in which the first processing circuit is active and the second processing circuit is not active, and   a third mode in which the first processing circuit the second processing circuit are active.