Interface substrate and method of making the same

Abstract

A package may include a substrate and a semiconductor die with the substrate having a smaller width than the semiconductor die and encapsulated in a mold compound. In one example, the package may be a wafer level package that allows an external connection on the backside of the package to enable manufacturing in a panel or wafer form.

What is claimed is: 
     
         1 . A package comprising:
 a semiconductor die with a perimeter defined by sidewalls and a width;   a package substrate with sidewalls, the package substrate located vertically below the semiconductor die within the perimeter;   a mold compound with sidewalls and a width configured to encapsulate the package substrate, the mold compound width is approximately the same as the semiconductor die width and each sidewall of the mold compound is co-planar with a respective sidewall of the semiconductor die;   a first plurality of pads on a first side of the package substrate;   a second plurality of pads on a second side of the package substrate;   a plurality of interconnects that extend from the first plurality of pads to the second plurality of pads; and   a redistribution layer embedded in the package substrate proximate the second side of the package substrate and embedded in the mold compound wherein the second side of the package substrate faces the semiconductor die.   
     
     
         2 . The package of  claim 1 , wherein the sidewalls of the package substrate are not exposed and the package substrate is completely underneath the semiconductor die. 
     
     
         3 . The package of  claim 1 , wherein the mold compound is completely underneath the semiconductor die within the perimeter of the semiconductor die. 
     
     
         4 . The package of  claim 1 , further comprising:
 a plurality of first contacts on the first plurality of pads; and   a plurality of second contacts on the second plurality of pads, the plurality of second contacts coupled to the semiconductor die.   
     
     
         5 . The package of  claim 4 , wherein the plurality of first contacts are solder bumps or solder balls and the plurality of second contacts are solder bumps or solder balls. 
     
     
         6 . The package of  claim 1 , wherein the plurality of interconnects are copper pillars or conductive vias. 
     
     
         7 . The package of  claim 1 , wherein the sidewalls of the package substrate are parallel to sidewalls of the mold compound. 
     
     
         8 . The package of  claim 1 , wherein the package is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle, and further including the device. 
     
     
         9 . The package of  claim 1 , wherein the mold compound includes a width sized to approximately match the semiconductor die width. 
     
     
         10 . The package of  claim 1 , wherein the package substrate is smaller in size than the semiconductor die. 
     
     
         11 . A method for forming a package, comprising:
 forming a plurality of substrates, each of the plurality of substrates has a first width;   forming a plurality of semiconductor dies on a wafer, each of the plurality of semiconductor dies has a second width larger than the first width;   placing the plurality of substrates on the plurality of semiconductor dies;   attaching each of the plurality of substrates to a corresponding one of the plurality of semiconductor dies;
 applying a mold compound to the wafer, the mold compound configured to encapsulate the plurality of substrates, wherein each semiconductor die has a perimeter defined by sidewalls and a width, each substrate has sidewalls and is vertically below one of the plurality of semiconductor dies within the perimeter, and the mold compound has sidewalls and a width configured to encapsulate one of the plurality of substrates and is approximately the same as the semiconductor die width and each sidewall of the mold compound is co-planar with a respective sidewall of the semiconductor die; and 
   singulating the wafer to form a plurality of packages, each of the plurality of packages comprises one of the plurality of substrates and one of the plurality of semiconductor dies and each of the plurality of packages has a third width approximately equal to the second width.   
     
     
         12 . The method of  claim 11 , wherein the forming each of the plurality of substrates comprises:
 forming a plurality of interconnects that extend from a first side of the substrate to a second side of the substrate opposite the first side of the substrate;   forming a redistribution layer embedded in the substrate proximate the second side of the substrate;   forming a first plurality of pads on the first side of the substrate, the first plurality of pads connected to the plurality of interconnects;   forming a plurality of first contacts on the first plurality of pads;   forming a second plurality of pads on the second side of the substrate, the second plurality of pads connected to the plurality of interconnects;   forming a plurality of second contacts on the second plurality of pads; and   applying a mold compound configured to encapsulate the substrate.   
     
     
         13 . The method of  claim 12 , wherein sidewalls of each of the plurality of substrates are not exposed. 
     
     
         14 . The method of  claim 12 , wherein each of the plurality of substrates is completely underneath a corresponding one of the plurality of semiconductor dies. 
     
     
         15 . The method of  claim 12 , wherein, after the singulating, the mold compound is completely underneath each of the plurality of semiconductor dies within a perimeter of each of plurality of semiconductor dies. 
     
     
         16 . The method of  claim 12 , wherein the plurality of first contacts are solder bumps or solder balls and the plurality of second contacts are solder bumps or solder balls. 
     
     
         17 . The method of  claim 12 , wherein the plurality of interconnects are copper pillars or conductive vias. 
     
     
         18 . The method of  claim 12 , wherein each of the plurality of substrates is composed of ceramic or organic materials. 
     
     
         19 . The method of  claim 12 , wherein at least one of the plurality of packages is incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle, and further including the device. 
     
     
         20 . The method of  claim 11 , wherein the attaching each of the plurality of substrates to the corresponding one of the plurality of semiconductor dies comprises a solder reflow process or a curing process.