US2020052078A1PendingUtilityA1

Low collector contact resistance heterojunction bipolar transistors

Assignee: QUALCOMM INCPriority: Mar 27, 2018Filed: Oct 22, 2019Published: Feb 13, 2020
Est. expiryMar 27, 2038(~11.7 yrs left)· nominal 20-yr term from priority
H10P 50/691H10P 50/646H10D 64/0116H01L 21/308H01L 21/28575H01L 29/41708H01L 29/0826H01L 29/205H01L 21/30612H01L 29/1004H01L 29/66242H01L 29/452H01L 29/0817H01L 29/737H10D 62/85H10D 64/62H10D 62/824H10D 62/177H10D 62/138H10D 62/136H10D 10/80H10D 10/021H10D 10/821H10D 64/01H10D 62/135H10D 62/124H10D 64/231
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Claims

Abstract

In certain aspects, a heterojunction bipolar transistor (HBT) comprises a collector mesa, a base mesa on the collector mesa, and an emitter mesa on the base mesa. The base mesa has a tapered sidewall tapering from a wide bottom to a narrow top. The HBT further comprises a collector contact on a portion of the collector mesa and extending to a portion of the tapered sidewall of the base mesa.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method, comprising:
 providing an HBT comprising a collector mesa, a base mesa on the collector mesa, and an emitter mesa on the base mesa, wherein the base mesa has a tapered sidewall tapering from a wide bottom to a narrow top;   forming a photoresist layer on the HBT;   patterning the photoresist layer with one or more photoresist openings, wherein the one or more photoresist openings expose a first region of the collector mesa and a first region of the tapered sidewall of the base mesa; and   depositing a collector contact metal over the first region of the collector mesa and the first region of the tapered sidewall of the base mesa.   
     
     
         2 . The method of  claim 1 , wherein the collector mesa comprises GaAs. 
     
     
         3 . The method of  claim 1 , wherein the collector mesa comprises a substrate and a first sub-collector on the substrate and wherein the base mesa comprises a second sub-collector on the collector mesa. 
     
     
         4 . The method of  claim 3  further comprising an etch stop layer between the first sub-collector and the second sub-collector. 
     
     
         5 . The method of  claim 3 , wherein the collector contact metal is on a sidewall of the second sub-collector. 
     
     
         6 . The method of  claim 5 , wherein the collector contact metal is on lower portion of the tapered sidewall of the base mesa. 
     
     
         7 . The method of  claim 1  further comprising
 forming a mask layer over the HBT; 
 patterning the mask layer with one or more mask openings exposing a second region of the collector mesa; 
 etching a layer of the collector mesa in the second region of the collector mesa; and 
 growing an metal alloy in the second region of the collector mesa. 
 
     
     
         8 . The method of  claim 7 , wherein the second region of the collector mesa is the same as the first region of the collector mesa. 
     
     
         9 . The method of  claim 7 , wherein the metal alloy has a lower bandgap than that of the collector mesa. 
     
     
         10 . The method of  claim 9 , wherein the metal alloy comprises InAs or InGaAs. 
     
     
         11 . The method of  claim 7 , wherein the one or more mask openings expose a second region of the tapered sidewall of the base mesa. 
     
     
         12 . the method of  claim 11 , wherein the second region of the tapered sidewall is the same as the first region of the tapered sidewall.

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