Controller and operation method thereof

Abstract

A controller includes a memory suitable for storing first data read from first memory blocks of a first super memory block included in a memory device; a rearranging unit suitable for rearranging the first data stored in the memory based on sequence-information of the first data stored in the memory; and a processor suitable for controlling the memory device to write the rearranged first data in a second super memory block of the memory device.

What is claimed is: 
     
         1 . A memory system comprising:
 a memory device including first and second groups including a plurality of memory blocks, respectively; and   a controller configured to copy data stored in the first group into the second group,   wherein the controller is configured to:
 sort the data read from the first group according to logical addresses; and 
 program the sorted data into the second group. 
   
     
     
         2 . The memory system according to  claim 1 , wherein the controller further comprises a memory storing the data read from the first group, and
 wherein the controller is configured to sort the data stored in the memory.   
     
     
         3 . The memory system according to  claim 1 , wherein the controller is configured to sort the data in an ascending order of the logical addresses. 
     
     
         4 . The memory system according to  claim 2 , wherein the controller is configured to sort the data when a size of the data stored in the memory is equal to or greater than a threshold value. 
     
     
         5 . The memory system according to  claim 2 , wherein the controller is configured to program the data into the second group in an interleaving manner when the data stored in the memory are sorted. 
     
     
         6 . The memory system according to  claim 1 , wherein the data read from the first group are sequential. 
     
     
         7 . A memory system comprising:
 a memory device including first and second groups including a plurality of memory blocks, respectively; and   a controller configured to issue instructions to each of a plurality of processor cores,   wherein each of the processor cores is configured to exclusively perform assigned operation in response to the respective instructions during a garbage collection operation, and   wherein the controller includes:
 a first processor core configured to sort data read from the first group based on logical addresses; and 
 a second processor core configured to program the sorted data into the second group. 
   
     
     
         8 . The memory system according to  claim 7 , wherein the first processor core is configured to sort the data in an ascending order of the logical addresses. 
     
     
         9 . The memory system according to  claim 7 , wherein the first processor core is configured to sort the data when a size of the read data is equal to or greater than a threshold value. 
     
     
         10 . The memory system according to  claim 7 , wherein the controller further includes a third processor configured to read the data from the first group, and
 wherein the read data are valid.   
     
     
         11 . A memory system comprising:
 a memory device including first and second groups including a plurality of memory blocks, respectively; and   a controller configured to perform a garbage collection operation of copying data from the first group into the second group,   wherein the controller is configured to:
 sort the data read from the first group if a size of the read data satisfies a predetermined condition; and 
 program the sorted data into the second group. 
   
     
     
         12 . The memory system according to  claim 11 , wherein the predetermined condition is satisfied when the size of the read data is equal to or greater than a threshold value. 
     
     
         13 . The memory system according to  claim 12 , wherein the threshold value is equal to or greater than units of a page. 
     
     
         14 . The memory system according to  claim 12 , wherein the controller is configured to sort the data according to logical addresses. 
     
     
         15 . A memory system comprising:
 a memory device including first and second groups including a plurality of memory blocks, respectively; and   a controller configured to copy data from the first group into the second group during a garbage collection operation;   wherein the controller is configured to:
 sort the data read from the first group if a characteristic of the read data satisfies a predetermined condition; and 
 program the sorted data into the second group. 
   
     
     
         16 . The memory system according to  claim 15 , wherein the controller is further configured to read meta data corresponding to the data read from the first group. 
     
     
         17 . The memory system according to  claim 16 , wherein the meta data includes an information of the characteristic of the corresponding data. 
     
     
         18 . The memory system according to  claim 15 , wherein the predetermined condition is satisfied if the read data are hot. 
     
     
         19 . The memory system according to  claim 18 , wherein the controller is configured to sort the data when a size of the read data is equal to or greater than a threshold value. 
     
     
         20 . The memory system according to  claim 15 , wherein the controller is configured to sort the data in an ascending order of logical addresses.