Method and Apparatus for Semiconductor Manufacturing

Abstract

Examples herein are related to a method and apparatus for determining dimensions of features in a patterned layer of a chip produced on a semiconductor production wafer. The production of the patterned layer includes a lithography step and an etching step, where the lithographic mask applied for producing the patterned layer is provided with one or more asymmetric marks. The position of printed and etched mark features is sensitive to lithographic and etch parameters. Changes in these positions are measured by overlay measurements, i.e. the measurement of the change in position of one mark relative to another. The obtained ‘pseudo’ overlay data are fitted to a parametric model, while characteristic feature dimensions are measured on a test wafer. The inverted model allows determination of feature dimensions on a production wafer. Application of the method on two different layers allows determination of edge placement errors between features of the two layers.

1 . An apparatus for lithography and etching of features on a semiconductor wafer, wherein the apparatus comprises:
 a metrology tool configured to determine the position of a printed mark pattern and an etched mark pattern obtained from an asymmetric metrology mark included in a lithography mask applied in the apparatus,   a computer-implemented verification unit comprising a memory provided with a computer program for executing at least the following steps, when run on the verification unit:
 acquiring through the metrology tool a plurality of position-representative values associated respectively to a plurality of asymmetric marks, 
 calculating values of lithographic and/or etch parameters based on a first parametric model that links the position-representative values to the parameters, 
 calculating characteristic dimensions of features on the wafer based on a second parametric model that links the lithographic and/or etch parameters to the characteristic dimensions, 
 evaluating the characteristic dimensions in comparison with a tolerance. 
   
     
     
         2 . The apparatus according to  claim 1 , wherein the verification unit is furthermore configured to update one or more of the lithographic and/or etch parameters, as required by the evaluation result. 
     
     
         3 . The apparatus according to  claim 1 , wherein the metrology tool is an IBO tool or a DBO tool. 
     
     
         4 . A verification unit as described in  claim 1 , comprising a memory provided with a computer program for executing the steps, when the program is run on the verification unit. 
     
     
         5 . A computer program product applicable in the verification unit of  claim 4 , and configured to execute the steps, when the program is run on the verification unit.