US2020035816A1PendingUtilityA1

Semiconductor structure with gallium arsenide and tantalum nitride

Assignee: SKYWORKS SOLUTIONS INCPriority: Nov 16, 2011Filed: Aug 5, 2019Published: Jan 30, 2020
Est. expiryNov 16, 2031(~5.3 yrs left)· nominal 20-yr term from priority
H10D 8/051H10D 62/85H10W 90/754H10W 72/5449H10W 72/932H10W 70/656H01L 29/66212H01L 29/0692H01L 29/872H01L 31/02002H01L 29/66007H01L 29/73H01L 29/475H01L 29/68H01L 29/66318H10D 62/126H10D 64/64H10D 48/01H10D 30/6738H10D 30/675H10D 10/021H10D 10/00H10D 8/60H10F 77/93H10D 48/32
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Claims

Abstract

Disclosed are structures and methods related to metallization of a gallium arsenide (GaAs) layer. In some embodiments, a tantalum nitride (TaN) layer can be formed on a doped GaAs layer, and a metal layer can be formed on the TaN layer. Such a structure can be included in a Schottky diode. In some embodiments, such a Schottky diode can be fabricated utilizing heterojunction bipolar transistor (HBT) processes.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor structure comprising:
 a gallium arsenide substrate;   a sub-collector layer over the gallium arsenide substrate;   a collector layer over and in physical contact with the sub-collector layer; and   a tantalum nitride layer including a surface that is planar, an entirety of the surface being in physical contact with the collector layer.   
     
     
         3 . The semiconductor structure of  claim 2  wherein the collector layer includes n− gallium arsenide and the sub-collector layer includes n+ gallium arsenide. 
     
     
         4 . The semiconductor structure of  claim 2  wherein the gallium arsenide substrate includes semi-insulating gallium arsenide. 
     
     
         5 . The semiconductor structure of  claim 2  further comprising an electrical contact in physical contact with the sub-collector layer on opposing sides of the tantalum nitride layer. 
     
     
         6 . The semiconductor structure of  claim 2  further comprising an isolation implant having a surface that is co-planar with a surface of the sub-collector layer. 
     
     
         7 . A Schottky diode comprising:
 a first doped gallium arsenide layer;   a second doped gallium arsenide layer over and in physical contact with the first doped gallium arsenide layer;   a tantalum nitride layer including a surface that is planar, an entirety of the surface being in physical contact with the second doped gallium arsenide layer; and   electrical contacts including a first contact on the tantalum nitride layer and a second contact on the first doped gallium arsenide layer, the Schottky diode having a turn-on voltage.   
     
     
         8 . The Schottky diode of  claim 7  wherein the turn-on voltage is 0.45 Volts or less. 
     
     
         9 . The Schottky diode of  claim 7  wherein the turn-on voltage is about 0.42 Volts. 
     
     
         10 . The Schottky diode of  claim 7  wherein the first contact is arranged as an anode of the Schottky diode, and the second contact is arranged as a cathode of the Schottky diode. 
     
     
         11 . The Schottky diode of  claim 7  wherein the second contact is in physical contact with the first doped gallium arsenide layer on opposing sides of the tantalum nitride layer. 
     
     
         12 . The Schottky diode of  claim 11  wherein the second contact has an inverted-U shaped footprint. 
     
     
         13 . The Schottky diode of  claim 7  wherein the first doped gallium arsenide layer includes n+ gallium arsenide and the second doped gallium arsenide layer includes n− gallium arsenide. 
     
     
         14 . The Schottky diode of  claim 7  wherein a doping concentration of the first doped gallium arsenide layer is greater than a doping concentration of the second doped gallium arsenide layer. 
     
     
         15 . The Schottky diode of  claim 7  further comprising a passivation structure, the tantalum nitride layer and a passivation structure being in physical contact with and fully covering the second doped gallium arsenide layer. 
     
     
         16 . An electronic module comprising:
 a packaging substrate; and   a semiconductor device on the packaging substrate, the semiconductor device including a first doped gallium arsenide layer, a second doped gallium arsenide layer over and in physical contact with the first doped gallium arsenide layer, and a tantalum nitride layer including a surface that is planar, an entirety of the surface of the tantalum nitride layer being in physical contact with the second doped gallium arsenide layer.   
     
     
         17 . The electronic module of  claim 16  further comprising an overmold over the semiconductor device. 
     
     
         18 . The electronic module of  claim 16  wherein the semiconductor device is a radio frequency power detector. 
     
     
         19 . The electronic module of  claim 16  wherein the semiconductor device is a photoelectric cell. 
     
     
         20 . The electronic module of  claim 16  wherein the semiconductor device is a radio frequency mixer. 
     
     
         21 . The electronic module of  claim 16  wherein the semiconductor device further includes a heterojunction bipolar transistor on a gallium arsenide substrate, and the first doped gallium arsenide layer is positioned on the gallium arsenide substrate.

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