Ultrasonic Diagnosis Device and Electronic Circuit

Abstract

An electronic circuit in an ultrasonic probe includes a plurality of sub beamformers and a control unit. Each sub beamformer includes M delay circuits and an adding circuit. Each delay circuit includes a memory cell array which is formed of N memory cells. Conditions of cyclic operations of the M memory cell arrays (for example, timings of start triggers) are made irregular, such that use starting stage numbers in the M memory cell arrays are different.

What is claimed is: 
     
         1 . An ultrasonic diagnosis device comprising:
 M delay circuits configured to delay M reception signals, each delay circuit comprising a memory cell array which is formed of N memory cells from a first stage to an N-th stage, the M delay circuits operating in parallel;   an adding circuit configured to add the M reception signals output from the M delay circuits; and   a control unit configured to control a cyclic operation of the memory cell array according to a set delay time in each delay circuit, wherein   conditions of the cyclic operations of the M memory cell arrays are made irregular, such that use starting stage numbers in the M memory cell arrays included in the M delay circuits are different.   
     
     
         2 . The ultrasonic diagnosis device of  claim 1 , wherein
 in each of the delay circuits, the cyclic operation of the memory cell array starts according to a start trigger, and   the control unit is configured to make timings of M start triggers to be applied to the M delay circuits irregular.   
     
     
         3 . The ultrasonic diagnosis device of  claim 2 , wherein
 the control unit is configured to correct the timings of the M start triggers according to the delay time set in each of the delay circuits.   
     
     
         4 . The ultrasonic diagnosis device of  claim 1 , wherein
 in each of the delay circuits, the cyclic operation of the memory cell array starts from a memory cell of a stage number corresponding to an offset, and   the control unit is configured to make M offsets to be applied to the M delay circuits irregular.   
     
     
         5 . The ultrasonic diagnosis device of  claim 4 , wherein
 the control unit is configured to correct the M offsets according to the delay time set in each of the delay circuits.   
     
     
         6 . The ultrasonic diagnosis device of  claim 1 , wherein
 the control unit includes:   a generation circuit installed in each of the delay circuits to generate N control signals to be applied to the N memory cells; and   a wiring change circuit configured to change wirings of the N control signals in each delay circuit which is required to change wiring from among the M delay circuits, and to output N control signals after wiring change, and   the wirings of the N control signals after the wiring change are made irregular over the M delay circuits.   
     
     
         7 . The ultrasonic diagnosis device of  claim 6 , wherein
 each of the wiring change circuits is a selection circuit to which N control signals before wiring change, and N control signals after wiring change which are shifted from the N control signals before the wiring change as much as a predetermined number of stages, are input, and   the selection circuit is configured to select the N control signals before the wiring change in a non-shift mode, and to select the N control signals after the wiring change in a shift mode.   
     
     
         8 . The ultrasonic diagnosis device of  claim 6 , further comprising:
 a vibration element array which is formed of a plurality of vibration elements two-dimensionally wired, wherein   a plurality of sub arrays two-dimensionally wired are set with respect to the vibration element array,   the M delay circuits are connected to the sub array based on the sub array, and   the wirings of the N control signals after the wiring change are made irregular over the plurality of sub arrays.   
     
     
         9 . An electronic circuit comprising:
 M delay circuits installed in an ultrasonic probe to delay M reception signals, each delay circuit comprising a memory cell array which is formed of N memory cells from a first stage to an N-th stage, the M delay circuits operating in parallel;   an adding circuit installed in the ultrasonic probe to add the M reception signals output from the M delay circuits; and   a control unit installed in the ultrasonic probe to control a cyclic operation of the memory cell array according to a set delay time in each of the delay circuits, wherein   conditions of the cyclic operations of the M memory cell arrays are made irregular, such that use starting stage numbers in the M memory cell arrays included in the M delay circuits are different.