US2020012514A1PendingUtilityA1

Systems, Methods, and Apparatuses for Resource Monitoring

Assignee: INTEL CORPPriority: Mar 27, 2015Filed: May 9, 2019Published: Jan 9, 2020
Est. expiryMar 27, 2035(~8.6 yrs left)· nominal 20-yr term from priority
G06F 11/301G06F 11/3089G06F 2201/865G06F 11/30G06F 2009/4557G06F 9/46G06F 2009/45591G06F 9/45558
60
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Claims

Abstract

Systems, methods, and apparatuses for resource monitoring identification reuse are described. In an embodiment, a system comprising a hardware processor core to execute instructions storage for a resource monitoring identification (RMID) recycling instructions to be executed by a hardware processor core, a logical processor to execute on the hardware processor core, the logical processor including associated storage for a RMID and state, are described.

Claims

exact text as granted — not AI-modified
We claim: 
     
         1 . A system comprising:
 a hardware processor core to execute instructions;   storage for a resource monitoring identification (RMID) recycling instructions to be executed by a hardware processor core;   a logical processor to execute on the hardware processor core, the logical processor including associated storage for a RMID and state.   
     
     
         2 . The system of  claim 1 , wherein the logical processor is a thread. 
     
     
         3 . The system of  claim 1 , wherein the storage for the RMID is a machine state register per logical processor in the hardware processor core. 
     
     
         4 . The system of  claim 1 , wherein the hardware core further comprises:
 a plurality of machine state registers to store resource monitoring data; and   a plurality of machine state registers to store an event to be associated with an RMID.   
     
     
         5 . The system of  claim 4 , wherein the event is memory bandwidth. 
     
     
         6 . The system of  claim 4 , wherein the event is cache occupancy. 
     
     
         7 . The system of  claim 1 , wherein the RMID recycling instructions, when executed by the hardware processor core to cause:
 a selection of a least recently used RMID;   at hardware processor core swap on, a write of the selected RMID to the associated storage for the RMID and a write of a logical processor state to the associated storage for the state; and   at hardware processor core swap off, a return of the selected RMID to a pool.   
     
     
         8 . The system of  claim 7 , wherein the RMID recycling instructions, when executed by the hardware processor core to further cause a selection of a physical RMID. 
     
     
         9 . The system of  claim 7 , wherein the RMID is to be returned to the pool as a most recently used RMID. 
     
     
         10 . The system of  claim 1 , wherein the RMID recycling instructions, when executed by the hardware processor core to cause:
 a selection of an RMID from a least recently used end of a first in, first out queue of RMIDs;   a determination that the selected RMID's occupancy is below a threshold;
 at hardware processor core swap on, a write of the selected RMID to the associated storage for the RMID and a write of a logical processor state to the associated storage for the state; and 
   at hardware processor core swap off, a return of the selected RMID to a pool.   
     
     
         11 . The system of  claim 1 , wherein the RMID recycling instructions, when executed by the hardware processor core to cause:
 an establishment of a baseline of cache occupancy for an RMID;   select an RMID and measure its cache occupancy at hardware processor core swap on of the logical processor;   measure the cache occupancy of the RMID at hardware processor core swap off of the logical processor;   update the baseline with a delta value based on the measured cache occupancy to the baseline.   
     
     
         12 . The system of  claim 1 , wherein the RMID recycling instructions, when executed by the hardware processor core to cause: 
     
     
         13 . The system of  claim 12 , wherein the counter is a hardware counter. 
     
     
         14 . The system of  claim 12 , wherein the counter is a register. 
     
     
         15 . A method comprising:
 selecting a least recently used resource monitoring identification (RMID);   at hardware processor core swap on, writing the selected RMID to the associated storage for the RMID and writing of a logical processor state to the associated storage for the state; and   at hardware processor core swap off, returning of the selected RMID to a pool.   
     
     
         16 . The method of  claim 15 , further comprising:
 determining that a cache occupancy associated with the selected RMID is below a threshold.   
     
     
         17 . The method of  claim 15 , wherein the logical processor is a thread. 
     
     
         18 . The method of  claim 15 , wherein the storage for the RMID is a machine state register per logical processor in the hardware processor core. 
     
     
         19 . The method of  claim 15 , wherein the hardware core further comprises:
 a plurality of machine state registers to store resource monitoring data; and   a plurality of machine state registers to store an event to be associated with an RMID.   
     
     
         20 . The method of  claim 19 , wherein the event is cache occupancy.

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