US2019386698A1PendingUtilityA1

Modified Current Mirror Circuit for Reduction of Switching Time

Assignee: SKYWORKS SOLUTIONS INCPriority: Sep 22, 2015Filed: Aug 29, 2019Published: Dec 19, 2019
Est. expirySep 22, 2035(~9.1 yrs left)· nominal 20-yr term from priority
H10W 44/226H10W 44/20H03F 1/30H03F 1/0261G05F 3/262H03F 1/301H03F 3/195H03F 2200/294H03F 2200/18H03F 1/304H04B 1/40H03F 2200/21H03F 2200/451H03F 3/193H03F 3/245
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Claims

Abstract

A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated.

Claims

exact text as granted — not AI-modified
1 - 33 . (canceled) 
     
     
         34 . A current mirror circuit connectible to an amplifier circuit to set a bias point thereof, the current mirror circuit comprising:
 a current mirror transistor;   a bias resistor connected to the current mirror transistor and connectible to the amplifier circuit;   a helper circuit connected in parallel with the bias resistor, the helper circuit being selectively activated for a predetermined duration by a control signal, the activated helper circuit defining a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror transistor is activated; and   a helper control circuit connected to the helper circuit and including a series capacitor connected to a shunt resistor, the control signal being output by the helper control circuit in response to an enable logic signal transitioning from an off state to an on state.   
     
     
         35 . The current mirror circuit of  claim 34  wherein the helper circuit includes a field effect transistor having a gate, a source, and a drain. 
     
     
         36 . The current mirror circuit of  claim 35  wherein the transistor of the helper circuit is a metal oxide semiconductor field effect transistor. 
     
     
         37 . The current mirror circuit of  claim 34  further comprising a secondary bias resistor connected in series with the bias resistor. 
     
     
         38 . The current mirror circuit of  claim 37  wherein the helper circuit is connected in series with the secondary bias resistor. 
     
     
         39 . A radio frequency amplifier circuit comprising:
 the current mirror circuit of  claim 34 ; and   a primary amplifier circuit connected to the bias resistor.   
     
     
         40 . The radio frequency amplifier circuit of  claim 39  further comprising a switch circuit connectible to the primary amplifier circuit, the primary amplifier circuit being shorted to ground in response to an activation of the switch circuit. 
     
     
         41 . The radio frequency amplifier circuit of  claim 40  wherein the switch circuit is activated in response to an inverted enable logic signal. 
     
     
         42 . A radio frequency communications module comprising:
 the radio frequency amplifier circuit of  claim 39 ; and   a packaging substrate on which the radio frequency amplifier circuit is mounted.   
     
     
         43 . The radio frequency communications module of  claim 42  wherein the primary amplifier circuit is a low noise amplifier. 
     
     
         44 . The radio frequency communications module of  claim 42  wherein the primary amplifier circuit is a power amplifier. 
     
     
         45 . A wireless communications device comprising:
 the radio frequency amplifier circuit of  claim 39 ; and   an antenna receptive to an incoming radio frequency signal and transmissive of an outgoing radio frequency signal.   
     
     
         46 . The wireless communications device of  claim 45  wherein the primary amplifier circuit is a low noise amplifier configured to amplify the incoming radio frequency signal. 
     
     
         47 . The wireless communications device of  claim 45  wherein the primary amplifier circuit is a power amplifier configured to amplify the outgoing radio frequency signal. 
     
     
         48 . A current mirror circuit connectible to an amplifier circuit to set a bias point thereof, the current mirror circuit comprising:
 a current mirror transistor;   a bias resistor connected to the current mirror transistor and connectible to the amplifier circuit;   a helper circuit connected in parallel with the bias resistor, the helper circuit being selectively activated for a predetermined duration by a control signal, the activated helper circuit defining a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror transistor is activated; and   a helper control circuit connected to the helper circuit and including a high pass filter, the control signal being output by the helper control circuit in response to an enable logic signal transitioning from an off state to an on state.   
     
     
         49 . The current mirror circuit of  claim 48  further comprising a secondary bias resistor connected in series with the bias resistor. 
     
     
         50 . The current mirror circuit of  claim 49  wherein the helper circuit is connected in series with the secondary bias resistor. 
     
     
         51 . A radio frequency amplifier circuit comprising:
 the current mirror circuit of  claim 48 ; and   a primary amplifier circuit connected to the bias resistor.   
     
     
         52 . The radio frequency amplifier circuit of  claim 51  further comprising a switch circuit connectible to the primary amplifier circuit, the primary amplifier circuit being shorted to ground in response to an activation of the switch circuit. 
     
     
         53 . The radio frequency amplifier circuit of  claim 52  wherein the switch circuit is activated in response to an inverted enable logic signal.

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