Selective dielectric resin application on circuitized core layers

Abstract

A process of manufacturing a multiple-layer printed circuit board includes selectively applying a dielectric resin to a region of a circuitized core layer. The process also includes partially curing the dielectric resin prior to performing a lamination cycle to form the multiple-layer printed circuit board that includes the circuitized core layer.

What is claimed is: 
     
         1 . A multiple-layer printed circuit board formed according to a process comprising:
 selectively applying a dielectric resin to a first region of a circuitized core layer without applying the dielectric resin to another region of the circuitized core layer;   partially curing the dielectric resin to the first region;   forming a layup that includes a layer of pre-impregnated (prepreg) material adjacent to the partially cured dielectric resin of the circuitized core layer; and   performing a lamination cycle to form a multiple-layer printed circuit board.   
     
     
         2 . The multiple-layer printed circuit board of  claim 1 , wherein selectively applying the dielectric resin includes utilizing an inkjet printer to dispense the dielectric resin within the region. 
     
     
         3 . The multiple-layer printed circuit board of  claim 1 , wherein the partially cured dielectric resin is substantially similar to a partially cured resin within the layer of pre-impregnated material. 
     
     
         4 . The multiple-layer printed circuit board of  claim 1 , the process further comprising:
 selectively applying the dielectric resin to a second region of the circuitized core layer, the second region having an increased demand for the dielectric resin; and   partially curing in the second region the dielectric resin prior to performing the lamination cycle.   
     
     
         5 . The multiple-layer printed circuit board of  claim 1 , wherein the dielectric resin is selectively applied to a surface of the circuitized core layer adjacent to a location of a plated through hole (PTH) to be formed after the lamination cycle. 
     
     
         6 . The multiple-layer printed circuit board of  claim 1 , wherein the dielectric resin is applied between adjacent copper traces of the circuitized core layer. 
     
     
         7 . The multiple-layer printed circuit board of  claim 6 , wherein a distance between the adjacent copper traces satisfies a threshold distance associated with increased resin demand. 
     
     
         8 . A multiple-layer printed circuit board comprising:
 a dielectric layer formed from a pre-impregnated (prepreg) material that includes a partially cured dielectric resin encapsulating a woven glass cloth; and   a circuitized core layer having a surface that is adjacent to the dielectric layer, the surface of the circuitized core layer having a plurality of regions, wherein a first region of dielectric material includes glass spheres encapsulated within a cured dielectric resin.   
     
     
         9 . The multiple-layer printed circuit board of  claim 8 , wherein the first region of dielectric material has a first dielectric constant that is substantially similar to a second dielectric constant associated with the dielectric layer that is adjacent to the surface of the circuitized core layer.