Semiconductor device

Abstract

A semiconductor device includes: a substrate; an insulator layer provided on the substrate; a first transistor provided on the insulator layer; a semiconductor layer including a plurality of impurity regions of a first conduction type, the impurity regions forming a part of the first transistor; a heat dissipation layer; a thermal conductive layer linking the semiconductor layer and the heat dissipation layer; and an interruption structure configured to interrupt a flow of a current between the first transistor and the thermal conductive layer.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate;   an insulator layer provided on the substrate;   a first FINFET transistor provided on the insulator layer;   a semiconductor layer including a plurality of impurity regions of a first conduction type, the impurity regions forming a part of the first transistor;   a heat dissipation layer on the substrate;   a thermal conductive layer linking the semiconductor layer and the heat dissipation layer; and   an interruption structure configured to interrupt a flow of a current between the first FINFET transistor and the thermal conductive layer.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising a second transistor provided on the insulator layer, as the interruption structure,
 wherein the impurity region of the first conduction type also forms a part of the second transistor, and   the thermal conductive layer links the impurity region of the first conduction type in the second transistor, with the heat dissipation layer.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein the first FINFET transistor is provided between a pair of second transistors each equivalent to the second transistor, in an in-plane direction. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein
 a plurality of first FINFET transistors each equivalent to the first FINFET transistor are arranged in a first direction, and   a pair of second transistors each equivalent to the second transistor are disposed at both ends with the plurality of first transistors interposed therebetween, in the first direction.   
     
     
         5 . The semiconductor device according to  claim 4 , wherein:
 the first FINFET transistor and the second transistor each include a source electrode, a drain electrode, and a gate electrode, the source electrode and the drain electrode each being connected to the impurity region of the first conduction type, the gate electrode being provided in a channel region with a gate insulating film interposed therebetween, and the channel region being provided between the plurality of impurity regions of the first conduction type, and   the thermal conductive layer is connected to the source electrode or the drain electrode in the second transistor.   
     
     
         6 . The semiconductor device according to  claim 5 , wherein an electric potential causing the second transistor to be in an OFF state is applied to the gate electrode in the second transistor. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein:
 the substrate also serves as the heat dissipation layer, and   the thermal conductive layer is connected to the substrate, in a region except a region in which the substrate and the semiconductor layer overlap each other.   
     
     
         8 . The semiconductor device according to  claim 1 , wherein:
 the substrate also serves as the heat dissipation layer, and   the thermal conductive layer links the semiconductor layer and the substrate, by passing through the insulator layer.   
     
     
         9 . The semiconductor device according to  claim 1 , wherein one or more metal layers are provided as the heat dissipation layer. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein:
 the semiconductor layer includes an impurity region of a second conduction type, as the interruption structure, and   the thermal conductive layer links the impurity region of the second conduction type, with the heat dissipation layer.   
     
     
         11 . The semiconductor device according to  claim 10 , wherein the first FINFET transistor is provided between a pair of impurity regions each equivalent to the impurity region of the second conduction type, in an in-plane direction.