Minimizing information leakage from combinatorial logic

Abstract

An apparatus, system and method are disclosed to block and replace intermediate combinatorial transitions that are correlated with secret data, also referred to as glitches, with random intermediate combinatorial transitions that are uncorrelated with the data being processed.

1 . A glitch block circuit for reducing information leakage due to combinatorial logic glitches, the glitch blocker circuit comprising:
 a multiplexer having an input signal comprising the glitches to be blocked and an uncorrelated signal that can be fixed or variable; and   a glitch block enable signal generator suitable to enable the glitch blocker generator circuit using a glitch blocker enable signal.   
     
     
         2 . The circuit of  claim 1 , wherein the glitch block enable signal is generated using Steady to Unpredictable (StU) logic for generating a glitch block enable. 
     
     
         3 . The circuit of  claim 2 , further comprising:
 at least two sets of StU logic suitable for generating the glitch block enable signal on every clock cycle that indicates a transition from unpredictable to steady or steady to unpredictable.   
     
     
         4 . The circuit of  claim 2 , further comprising:
 a series of chained StU logic suitable for generating multiple glitch block enables.   
     
     
         5 . The circuit of  claim 1 , wherein the glitch block enable signal generator uses fixed logic delay for generating the glitch block enable. 
     
     
         6 . The circuit of  claim 1 , wherein the glitch block enable signal is generated using phase delayed register XORing for generating a glitch block enable. 
     
     
         7 . The circuit of  claim 1 , wherein the glitch block enable signal is generated using high speed clock registers for generating a glitch block enable. 
     
     
         8 . A one-shot glitch generator, comprising:
 at least two multiplexers in series, wherein the multiplexers use a same select which selects an unpredictable input when one-shot glitches are beneficial to reduce a signal-to-noise ratio (SNR) of an information leakage and inputs consist of an uncorrelated signal that is uncorrelated to data being processed, wherein the data being processed is a fixed or random value variable, and wherein an unpredictable random value input signal is combined with an output of the previous multiplexer in the series unless it is the first multiplexer in the series; and   an output of the last multiplexer in the series, wherein the output is combined with a functional output, and wherein the combining causes no functional difference by creating a total combined signal difference of zero.   
     
     
         9 . The one-shot glitch generator of  claim 8 , wherein all or some of a masked circuits individual functional mask have the combined difference across all the one-shot glitch generators on the mask of zero. 
     
     
         10 . The one-shot glitch generator of  claim 8 , wherein XOR is used as the combining function. 
     
     
         11 . The one-shot glitch generator of  claim 8 , wherein addition is used as the combining function. 
     
     
         12 . The one-shot glitch generator of  claim 8 , further configured to combine additional data that is required to be combined with the functional output at any stage in the series of multiplexers. 
     
     
         13 . A glitch block circuit for reducing information leakage due to combinatorial logic glitches, consisting of:
 a multiplexer with an input signal that has glitches to be blocked and an uncorrelated signal that can be fixed or variable and a glitch block enable signal; and   a one-shot glitch generator consisting of multiplexers in series, wherein the multiplexers use the same select which selects the unpredictable input when one-shot glitches are beneficial to reduce the signal-to-noise ratio (SNR) of the information leakage and the inputs consist of an uncorrelated signal and is any signal that is uncorrelated to the data being processed, wherein the data is a fixed or random value variable and an unpredictable random value input signal is combined with the output of the previous multiplexer in series unless it is the first multiplexer; and   an output of the last multiplexer for combining with the functional output wherein the combining causes no functional difference by creating a total combined signal difference of zero.