US2019280125A1PendingUtilityA1
Metal-oxide semiconductor (mos) device with thick oxide
Est. expiryMay 23, 2037(~10.8 yrs left)· nominal 20-yr term from priority
H10W 20/435H10W 20/42H01L 27/0924H01L 29/0649H01L 29/7851H01L 29/66795H01L 23/5283H01L 27/0805H01L 29/93H01L 23/5226H01L 29/7855H10D 84/853H10D 84/212H10D 62/115H10D 30/6215H10D 30/024H10D 1/64H10D 30/6211
54
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Claims
Abstract
Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region disposed adjacent to a first side of the fin, and a second non-insulative region disposed adjacent to a second side of the fin. In certain aspects, the first non-insulative region and the second non-insulative region are separated by a trench, at least a portion of the trench being filled with a dielectric material disposed around the fin.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for fabricating a semiconductor device, comprising:
forming a semiconductor region comprising a fin; forming a first non-insulative region and a second non-insulative region adjacent to a first side and a second side of the fin, respectively, such that a trench is created around the fin; and filling at least a portion of the trench with a dielectric material.
2 . The method of claim 1 , further comprising:
forming a first dielectric layer between the first non-insulative region and the first side of the fin; and forming a second dielectric layer between the second non-insulative region and the second side of the fin.
3 . The method of claim 2 , wherein:
the first and second dielectric layers comprise high-k (HK) dielectrics; and the first and second non-insulative regions comprise metal gates (MG).
4 . The method of claim 1 , wherein the dielectric material comprises nitride.
5 . The method of claim 1 , further comprising forming a first insulative region and a second insulative region, wherein the first non-insulative region is formed above the first insulative region, wherein the second non-insulative region is formed above the second insulative region, and wherein the first insulative region and the second insulative region are separated by the fin.
6 . The method of claim 5 , further comprising forming a first contact and a second contact, wherein the first contact is coupled to the first non-insulative region and wherein the second contact is coupled to the second non-insulative region.
7 . The method of claim 1 , wherein:
the semiconductor region comprises another fin; the second non-insulative region is disposed adjacent to a first side of the other fin; and the method further comprises:
forming a third non-insulative region adjacent to a second side of the other fin such that another trench is created around the other fin; and
filling at least a portion of the other trench with another dielectric material.
8 . The method of claim 7 , further comprising forming an insulative layer spanning from the second side of the fin to the first side of the other fin before forming the first non-insulative region and the second non-insulative region.
9 . The method of claim 1 , further comprising:
forming a third non-insulative region adjacent to a first edge of the fin; and forming a fourth non-insulative region adjacent to a second edge of the fin.
10 . The method of claim 9 , wherein:
the third non-insulative region comprises an n-doped region; and the fourth non-insulative region comprises a p-doped region.
11 . The method of claim 9 , wherein:
the third and fourth non-insulative regions comprise n-doped regions or p-doped regions; and the semiconductor device is configured as a fin field-effect transistor (FinFET).
12 . The method of claim 9 , further comprising shorting the third and fourth non-insulative regions together, wherein the semiconductor device is configured as a capacitor.
13 . The method of claim 1 , wherein the dielectric material forms a notch above the fin.
14 . The method of claim 13 , further comprising forming a dielectric region above the first non-insulative region, the second non-insulative region, and the fin, wherein a portion of the dielectric region is disposed in the notch above the fin formed by the dielectric material.Join the waitlist — get patent alerts
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