Memory Devices, Memory Device Constructions, Constructions, Memory Device Forming Methods, Current Conducting Devices, and Memory Cell Programming Methods

Abstract

Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive states, and a diode configured to allow a current to flow from the wordline through the memory element to the bitline responsive to a voltage being applied across the wordline and the bitline and to decrease the current if the voltage is increased or decreased. Some embodiments include memory devices having a wordline, a bitline, memory element selectively configurable in one of two or more different resistive states, a first diode configured to inhibit a first current from flowing from the bitline to the wordline responsive to a first voltage, and a second diode comprising a dielectric material and configured to allow a second current to flow from the wordline to the bitline responsive to a second voltage.

1 - 61 . (canceled) 
     
     
         62 . A memory device comprising:
 a memory cell comprising:
 a memory component; and 
 a diode, the diode and the memory component having a common conductive layer. 
   
     
     
         63 . The memory device of  claim 62  wherein:
 the memory component comprises a memory element; 
 the diode comprises an insulative layer; and 
 the common conductive layer is against one of the memory element and the insulative layer. 
 
     
     
         64 . The memory device of  claim 62  wherein the memory component comprises:
 a wordline spaced from the common conductive layer; and 
 a memory element between the wordline and the common conductive layer. 
 
     
     
         65 . The memory device of  claim 62  wherein the diode comprises:
 a bitline spaced from the common conductive layer; and 
 an insulative layer between the bitline and the common conductive layer. 
 
     
     
         66 . The memory device of  claim 62  wherein the diode comprises at least one of the following configurations:
 at least one undoped layer, the at least one undoped layer being devoid of silicon; 
 at least three dielectric layers, one of the at least three dielectric layers against the common conductive layer; and 
 at least two staked, undoped, and discrete dielectric layers. 
 
     
     
         67 . The memory device of  claim 62  wherein the diode comprises at least one undoped dielectric layer. 
     
     
         68 . The memory device of  claim 62  wherein the memory component comprises a memory element and wherein the common conductive layer is against the memory element. 
     
     
         69 . The memory device of  claim 62  wherein the diode comprises an insulative layer and wherein the common conductive layer is against the insulative layer. 
     
     
         70 . The memory device of  claim 62  wherein the diode comprises at least two dielectric layers having different dielectric materials. 
     
     
         71 . The memory device of  claim 62  wherein the diode comprises at least three dielectric layers and each having different dielectric materials. 
     
     
         72 . The memory device of  claim 62  wherein the diode comprises at least three dielectric layers, and the at least three dielectric layers comprise one or more of the following compositions: aluminum nitride, aluminum oxide, hafnium oxide, magnesium oxide, niobium oxide, silicon nitride, silicon oxide, tantalum oxide, titanium oxide, yittrium oxide, and zirconium oxide. 
     
     
         73 . A memory device comprising:
 a memory cell comprising:
 a memory component; and 
 a diode, the diode and the memory component having a common layer, the common layer comprising at least one of the following materials:
 metals, metal-containing compositions and conductively-doped semiconductor materials. 
 
   
     
     
         74 . The memory device of  claim 73  wherein the metals comprise at least one of the following: tantalum, platinum, tungsten, aluminum, copper, gold, nickel and molybdenum. 
     
     
         75 . The memory device of  claim 73  wherein the metal-containing compositions comprise at least one of the following: metal nitrides and metal silicides. 
     
     
         76 . The memory device of  claim 73  wherein the common layer comprises a thickness range of from about 2 nanometers to about 20 nanometers.