Semiconductor Devices and Methods of Manufacture Thereof
Abstract
Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a first semiconductor chip including a first substrate and a first conductive feature formed over the first substrate, and a second semiconductor chip bonded to the first semiconductor chip. The second semiconductor chip includes a second substrate and a second conductive feature formed over the second substrate. A conductive plug is disposed through the first conductive feature and is coupled to the second conductive feature. The conductive plug includes a first portion disposed over the first conductive feature, the first portion having a first width, and a second portion disposed beneath or within the first conductive feature. The second portion has a second width. The first width is greater than the second width.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device, comprising:
a first semiconductor chip comprising a first substrate and a first conductive feature on the first substrate; a second semiconductor chip bonded to the first semiconductor chip, the second semiconductor chip comprising a second substrate and a second conductive feature on the second substrate, the second conductive feature is directly bonded to the first conductive feature at an interface between the first semiconductor chip and the second semiconductor chip; and a conductive plug disposed through the first semiconductor chip and coupled to the second conductive feature, wherein the conductive plug comprises:
a first portion disposed over the first conductive feature, the first portion comprising a first width;
a second portion disposed at least partially within the first conductive feature, the second portion comprising a second width, the first width is greater than the second width; and
a third portion within the first conductive feature, the third portion extending from the second portion to the second conductive feature, the third portion comprising a third width, and the second width is greater than the third width.
2 . The semiconductor device of claim 1 , wherein the first semiconductor chip comprises a plurality of dielectric layers, the first conductive feature being disposed in the plurality of dielectric layers, the second portion of the conductive plug being disposed at least partially in the plurality of dielectric layers.
3 . The semiconductor device of claim 1 , wherein the first portion of the conductive plug is disposed in the first substrate.
4 . The semiconductor device of claim 1 , wherein the first conductive feature is wider than the second conductive feature.
5 . The semiconductor device of claim 1 , further comprising a dielectric liner over the first substrate and along sidewalls of the first portion of the conductive plug, a portion of the dielectric liner extending under a bottom surface of the first portion of the conductive plug.
6 . The semiconductor device of claim 5 , further comprising a bottom anti-reflection coating (BARC) layer between the dielectric liner and the first substrate.
7 . The semiconductor device of claim 5 , wherein the dielectric liner is not disposed along sidewalls of at least a portion of the second portion of the conductive plug.
8 . The semiconductor device of claim 5 , further comprising a passivation layer over the dielectric liner.Join the waitlist — get patent alerts
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