US2019279952A1PendingUtilityA1

Semiconductor device

Assignee: TOSHIBA MEMORY CORPPriority: Mar 7, 2018Filed: Sep 10, 2018Published: Sep 12, 2019
Est. expiryMar 7, 2038(~11.6 yrs left)· nominal 20-yr term from priority
H10W 90/792H10W 80/732H10W 80/334H10W 72/07332H10W 72/07331H10W 72/952H10W 72/942H10W 72/934H10W 90/00H10W 20/42H10W 46/00H10W 90/722H10W 72/0198H10W 90/754H10W 72/944H10W 72/29H10W 72/59H10W 72/90H10W 80/168H10W 90/724H10W 72/252H10W 70/652H10W 70/60H10W 20/40H10B 43/27H01L 24/83H01L 24/05H01L 2224/80203H01L 2224/08148H01L 2224/83896H01L 24/08H01L 2224/05557H01L 2224/0807H01L 2224/0557H01L 2224/83203H01L 27/11582H01L 2224/05647H01L 2224/05655H01L 25/18H01L 2224/08059H01L 23/5226H10B 43/50
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Claims

Abstract

In one embodiment, a semiconductor device includes a first chip including a substrate, a first plug on the substrate, and a first pad on the first plug, and a second chip including a second plug and a second pad under the second plug. The second chip includes an electrode layer electrically connected to the second plug, a charge storage layer provided on a side face of the electrode layer via a first insulator, and a semiconductor layer provided on a side face of the charge storage layer via a second insulator. The first and second pads are bonded with each other, and the first and second plugs are disposed so that at least a portion of the first plug and at least a portion of the second plug do not overlap with each other in a first direction that is perpendicular to a surface of the substrate.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a first chip including a substrate, a first plug provided on the substrate, and a first pad provided on the first plug; and   a second chip including a second plug and a second pad provided under the second plug,   the second chip comprising:   an electrode layer electrically connected to the second plug;   a charge storage layer provided on a side face of the electrode layer via a first insulator; and   a semiconductor layer provided on a side face of the charge storage layer via a second insulator,   wherein   the first pad and the second pad are bonded with each other, and   the first and second plugs are disposed so that at least a portion of the first plug and at least a portion of the second plug do not overlap with each other in a first direction that is perpendicular to a surface of the substrate.   
     
     
         2 . The device of  claim 1 , wherein a thickness of the first plug is equal to or greater than twice as thick as a thickness of the first pad, and a thickness of the second plug is equal to or greater than twice as thick as a thickness of the second pad. 
     
     
         3 . The device of  claim 1 , further comprising:
 a first interconnect that extends in a first interconnect layer provided under the first plug and is electrically connected to the first plug; and   a second interconnect that extends in a second interconnect layer provided on the second plug and is electrically connected to the second plug.   
     
     
         4 . The device of  claim 3 , further comprising a third plug provided on the second pad and disposed so as not to contact each interconnect that extends in the second interconnect layer. 
     
     
         5 . The device of  claim 4 , wherein the first and third plugs are disposed so that at least a portion of the first plug and at least a portion of the third plug do not overlap with each other in the first direction. 
     
     
         6 . The device of  claim 3 , further comprising a fourth plug provided under the first pad and disposed so as not to contact each interconnect that extends in the first interconnect layer. 
     
     
         7 . The device of  claim 6 , wherein the second and fourth plugs are disposed so that at least a portion of the second portion and at least a portion of the fourth plug do not overlap with each other in the first direction. 
     
     
         8 . The device of  claim 1 , wherein the first and second pads contain copper or nickel. 
     
     
         9 . The device of  claim 1 , wherein the first and second pads are electrically connected to each other via a first projecting portion that projects from an upper face of the first pad and/or a second projecting portion that projects from a lower face of the second pad. 
     
     
         10 . The device of  claim 1 , wherein the first plug is electrically connected to a transistor provided below the first plug. 
     
     
         11 . The device of  claim 1 , wherein, in a case where a portion of the first plug and a portion of the second plug overlap with each other in the first direction, an area of an overlapping portion of the first and second plugs is equal to or less than ⅓ of an area of a non-overlapping portion of the first and second plugs. 
     
     
         12 . A semiconductor device comprising:
 a substrate;   a first plug provided above the substrate;   a first pad provided on the first plug;   a second pad provided on the first pad and electrically connected to the first pad; and   a second plug provided on the second pad,   wherein the first and second plugs are disposed so that the first and second plugs do not overlap with each other in a first direction that is perpendicular to a surface of the substrate.   
     
     
         13 . The device of  claim 12 , wherein a thickness of the first plug is equal to or greater than twice as thick as a thickness of the first pad, and a thickness of the second plug is equal to or greater than twice as thick as a thickness of the second pad. 
     
     
         14 . The device of  claim 12 , further comprising:
 a first interconnect that extends in a first interconnect layer provided under the first plug and is electrically connected to the first plug; and   a second interconnect that extends in a second interconnect layer provided on the second plug and is electrically connected to the second plug.   
     
     
         15 . The device of  claim 14 , further comprising a third plug provided on the second pad and disposed so as not to contact each interconnect that extends in the second interconnect layer. 
     
     
         16 . The device of  claim 15 , wherein the first and third plugs are disposed so that the first and third plugs do not overlap with each other in the first direction. 
     
     
         17 . The device of  claim 14 , further comprising a fourth plug provided under the first pad and disposed so as not to contact each interconnect that extends in the first interconnect layer. 
     
     
         18 . The device of  claim 17 , wherein the second and fourth plugs are disposed so that the second and fourth plugs do not overlap with each other in the first direction. 
     
     
         19 . The device of  claim 12 , wherein the first and second pads contain copper or nickel. 
     
     
         20 . The device of  claim 12 , wherein the first and second pads are electrically connected to each other via a first projecting portion that projects from an upper face of the first pad and/or a second projecting portion that projects from a lower face of the second pad.

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