Word line read disturb error reduction through fine grained access counter mechanism

Abstract

An apparatus is described. The apparatus includes a solid state drive having multiple three dimensional stacked FLASH memory chips and controller circuitry. The controller circuitry is to implement wear leveling of storage cells of the FLASH memory chips at a granularity of segments of blocks of said FLASH memory chips that are coupled to a same word line and source gate source node to diminish word line read disturb errors.

1 . A machine readable storage medium containing program code that when executed by a controller of a solid state drive causes a method to be performed, said method comprising:
 maintaining access counts to segments of blocks of FLASH memory chips of said solid state drive that are coupled to a same word line and source gate source node;   determining that a wear leveling threshold has been crossed for one of said segments; and,   causing data stored in said one of said segments to be swapped out of said one of said segments to diminish word line read disturb errors attributable to said one of said segments.   
     
     
         2 . The machine readable storage medium of  claim 1  wherein the method further comprises adaptively adjusting said wear leveling threshold based on a count value of said access counts. 
     
     
         3 . The machine readable storage medium of  claim 2  wherein the method further comprises maintaining different access counts for different blocks within different ones of said FLASH memory chips. 
     
     
         4 . The machine readable storage medium of  claim 3  wherein the method further comprises adaptively adjusting said wear leveling threshold based on a count value of said access counts and said different access counts. 
     
     
         5 . The machine readable medium of  claim 2  wherein the method further comprises adjusting how many of said segments are to have their respective data swapped out in response to said wear leveling threshold having been crossed. 
     
     
         6 . The machine readable medium of  claim 2  wherein said adaptively adjusting further comprises adjusting the threshold in response to accesses to same positioned ones of said segments within same blocks across multiple ones of said FLASH memory chips being evenly distributed.