Methods and systems for utilizing ultra-efficiency low noise configurations for phased array antennas

Abstract

Systems and methods are provided for utilizing ultra-efficiency low noise configurations for phased array antennas. Radio frequency integrated circuits (RFICs) may be used in phased array antennas to enable configuring large number of phase shifters in highly efficient manner, and to do so in optimal manner, such as with low noise.

What is claimed: 
     
         1 . A system, comprising:
 a phased array antenna comprising a plurality of antenna elements;   one or more radio frequency (RF) frontend circuits, wherein each of the one or more RF frontend circuits:
 comprises a plurality of phase shifters; and 
 controls operation of a corresponding subset of the plurality of antenna elements based on one or more control signals; and 
   one or more configuration circuits for controlling the plurality of the RF frontend circuits during configuration of the plurality of antenna elements, wherein:
 the one or more configuration circuits comprises a single setting circuit that sets the one or more control signals applied to each of the one or more RF frontend circuits; and 
 the single setting circuit comprises a selector circuit that outputs the one or more control signals to one of a plurality of level holder circuits, based on a selection control signal. 
   
     
     
         2 . The system of  claim 1 , wherein the radio frequency (RF) frontend circuits comprise radio frequency integrated circuit (RFIC) frontends. 
     
     
         3 . The system of  claim 1 , wherein the radio frequency (RF) frontend circuits are embedded into the phased array antenna. 
     
     
         4 . (canceled) 
     
     
         5 . (canceled) 
     
     
         6 . The system of  claim 1 , wherein the one or more configuration circuits comprises at least one signal adjusting circuit that adjust at least one input to the single setting circuit. 
     
     
         7 . The system of  claim 6 , wherein the at least one signal adjusting circuit comprises a digital-to-analog converter (DAC) circuit. 
     
     
         8 . The system of  claim 1 , wherein the one or more configuration circuits comprises a plurality of setting circuits, each of the plurality of signal setting circuits setting a particular control parameter for a respective one of the one or more RF frontend circuits. 
     
     
         9 . The system of  claim 8 , wherein the plurality of signal setting circuits comprise a plurality of digital-to-analog converter (DAC) circuits. 
     
     
         10 . A radio frequency integrated circuit (RFIC) frontend, comprising:
 a plurality of phase shifter circuits, wherein each of the plurality of phase shifter circuits controls shifts of one or more corresponding antenna elements;   one or more configuration circuits for controlling the plurality of phase shifter circuits based on one or more control signals, wherein the one or more configuration circuits comprises a plurality of level holder circuits associated with the plurality of phase shifter circuits; and   a selector circuit that provides output to one of the plurality of level holder circuits based on the one or more control signals.   
     
     
         11 . (canceled) 
     
     
         12 . The radio frequency integrated circuit (RFIC) frontend of  claim 10 , wherein each of plurality of level holder circuits is associated with a corresponding one of the plurality of phase shifter circuits. 
     
     
         13 . The radio frequency integrated circuit (RFIC) frontend of  claim 10 , wherein each of plurality of level holder circuits sets one or more control parameters of a particular one of the plurality of phase shifter circuits. 
     
     
         14 . (canceled) 
     
     
         15 . The radio frequency integrated circuit (RFIC) frontend of  claim 10 , wherein the one or more configuration circuits comprises a single level holder circuit that sets one or more control parameters of a particular one of the plurality of phase shifter circuits. 
     
     
         16 . The radio frequency integrated circuit (RFIC) frontend of  claim 15 , wherein the single level holder circuit selects the particular one of the plurality of phase shifter circuits based on a selection control signal. 
     
     
         17 . The radio frequency integrated circuit (RFIC) frontend of  claim 10 , wherein the one or more configuration circuits comprises at least one signal adjusting circuit that adjust at least one of the one or more control signals. 
     
     
         18 . The radio frequency integrated circuit (RFIC) frontend of  claim 17 , wherein the at least one signal adjusting circuit comprises an analog-to-digital converter (ADC) circuit. 
     
     
         19 . A system, comprising:
 a phased array antenna comprising a plurality of antenna elements;   one or more radio frequency (RF) frontend circuits, wherein each of the one or more RF frontend circuits:
 comprises a plurality of phase shifters; and 
 controls operation of a corresponding subset of the plurality of antenna elements based on one or more control signals; and 
   one or more configuration circuits for controlling the plurality of the RF frontend circuits during configuration of the plurality of antenna elements, wherein:
 the one or more configuration circuits comprises a single setting circuit that sets the one or more control signals applied each of the one or more RF frontend circuits; 
 the one or more configuration circuits comprises at least one signal adjusting circuit that adjust at least one input to the single setting circuit; and 
 the at least one signal adjusting circuit comprises a digital-to-analog converter (DAC) circuit. 
   
     
     
         20 . The system of  claim 19 , wherein the radio frequency (RF) frontend circuits comprise radio frequency integrated circuit (RFIC) frontends. 
     
     
         21 . The system of  claim 19 , wherein the radio frequency (RF) frontend circuits are embedded into the phased array antenna. 
     
     
         22 . The system of  claim 19 , wherein the one or more configuration circuits comprises a plurality of setting circuits, each of the plurality of signal setting circuits setting a particular control parameter for a respective one of the one or more RF frontend circuits. 
     
     
         23 . The system of  claim 22 , wherein the plurality of signal setting circuits comprise a plurality of digital-to-analog converter (DAC) circuits. 
     
     
         24 . A system, comprising:
 a phased array antenna comprising a plurality of antenna elements;   one or more radio frequency (RF) frontend circuits, wherein each of the one or more RF frontend circuits:
 comprises a plurality of phase shifters; and 
 controls operation of a corresponding subset of the plurality of antenna elements based on one or more control signals; and 
   one or more configuration circuits for controlling the plurality of the RF frontend circuits during configuration of the plurality of antenna elements;   wherein the one or more configuration circuits comprises a plurality of setting circuits, each of the plurality of signal setting circuits setting a particular control parameter for a respective one of the one or more RF frontend circuits.   
     
     
         25 . The system of  claim 24 , wherein the radio frequency (RF) frontend circuits comprise radio frequency integrated circuit (RFIC) frontends. 
     
     
         26 . The system of  claim 24 , wherein the radio frequency (RF) frontend circuits are embedded into the phased array antenna. 
     
     
         27 . The system of  claim 24 , wherein the plurality of signal setting circuits comprise a plurality of digital-to-analog converter (DAC) circuits. 
     
     
         28 . A radio frequency integrated circuit (RFIC) frontend, comprising:
 a plurality of phase shifter circuits, wherein each of the plurality of phase shifter circuits controls shifts of one or more corresponding antenna elements; and   one or more configuration circuits for controlling the plurality of phase shifter circuits based on one or more control signals, wherein:
 the one or more configuration circuits comprises a single level holder circuit that sets one or more control parameters of a particular one of the plurality of phase shifter circuits, 
 the one or more configuration circuits comprises a plurality of level holder circuits associated with the plurality of phase shifter circuits, and 
 the single level holder circuit selects the particular one of the plurality of phase shifter circuits based on a selection control signal. 
   
     
     
         29 . (canceled) 
     
     
         30 . The radio frequency integrated circuit (RFIC) frontend of  claim 28 , wherein each of plurality of level holder circuits is associated with a corresponding one of the plurality of phase shifter circuits. 
     
     
         31 . The radio frequency integrated circuit (RFIC) frontend of  claim 28 , wherein each of plurality of level holder circuits sets one or more control parameters of a particular one of the plurality of phase shifter circuits. 
     
     
         32 . The radio frequency integrated circuit (RFIC) frontend of  claim 28 , wherein the one or more configuration circuits comprises at least one signal adjusting circuit that adjust at least one of the one or more control signals. 
     
     
         33 . The radio frequency integrated circuit (RFIC) frontend of  claim 32 , wherein the at least one signal adjusting circuit comprises an analog-to-digital converter (ADC) circuit. 
     
     
         34 . A radio frequency integrated circuit (RFIC) frontend, comprising:
 a plurality of phase shifter circuits, wherein each of the plurality of phase shifter circuits controls shifts of one or more corresponding antenna elements; and   one or more configuration circuits for controlling the plurality of phase shifter circuits based on one or more control signals, wherein
 the one or more configuration circuits comprises at least one signal adjusting circuit that adjust at least one of the one or more control signals; 
 the one or more configuration circuits comprises a plurality of level holder circuits associated with the plurality of phase shifter circuits; and 
 the at least one signal adjusting circuit comprises an analog-to-digital converter (ADC) circuit. 
   
     
     
         35 . (canceled) 
     
     
         36 . The radio frequency integrated circuit (RFIC) frontend of  claim 34 , wherein each of plurality of level holder circuits is associated with a corresponding one of the plurality of phase shifter circuits. 
     
     
         37 . The radio frequency integrated circuit (RFIC) frontend of  claim 34 , wherein each of plurality of level holder circuits sets one or more control parameters of a particular one of the plurality of phase shifter circuits.