Current control using power cell isolation

Abstract

A radio-frequency device comprises a first radio-frequency signal node, a second radio-frequency signal node, a first power cell path coupled between the first radio-frequency signal node and a ground reference node, the first power cell path including a first transistor having an input terminal coupled to the second radio-frequency signal node, and a second power cell path coupled in parallel with the first power cell path between the first radio-frequency signal node and the ground reference node, the second power cell path including a second transistor having an input terminal coupled to the second radio-frequency signal node and an output terminal that is electrically isolated from an output terminal of the first transistor.

What is claimed is: 
     
         1 . A radio-frequency device comprising:
 a first radio-frequency signal node;   a second radio-frequency signal node;   a first power cell path coupled between the first radio-frequency signal node and a ground reference node, the first power cell path including a first transistor having an input terminal coupled to the second radio-frequency signal node; and   a second power cell path coupled in parallel with the first power cell path between the first radio-frequency signal node and the ground reference node, the second power cell path including a second transistor having an input terminal coupled to the second radio-frequency signal node and an output terminal that is electrically isolated from an output terminal of the first transistor.   
     
     
         2 . The radio-frequency device of  claim 1  wherein the first power cell path includes a third transistor having a first terminal coupled to the output terminal of the first transistor and a second terminal coupled to the second radio-frequency signal node. 
     
     
         3 . The radio-frequency device of  claim 2  wherein the second power cell path includes a fourth transistor having a first terminal coupled to the output terminal of the second transistor and a second terminal coupled to the second radio-frequency signal node. 
     
     
         4 . The radio-frequency device of  claim 3  wherein the third transistor and the fourth transistor isolate the output terminal of the second transistor from the output terminal of the first transistor. 
     
     
         5 . The radio-frequency device of  claim 3  wherein an input terminal of the third transistor is coupled to a grounded direct-current blocking capacitor. 
     
     
         6 . The radio-frequency device of  claim 1  further comprising a first resistor coupled in the first power cell path between the first transistor and the ground reference and a second resistor coupled in the second power cell path between the second transistor and the ground reference. 
     
     
         7 . The radio-frequency device of  claim 1  wherein the first transistor and the second transistor are configured to at least partially control current flow through the radio-frequency device. 
     
     
         8 . The radio-frequency device of  claim 1  wherein the electrical isolation between the output terminal of the first transistor and the output terminal of the second transistor prevents current hogging by either of the first power cell path or the second power cell path. 
     
     
         9 . The radio-frequency device of  claim 1  further comprising one or more additional power cell paths coupled in parallel with the first power cell path between the first radio-frequency signal node and the ground reference. 
     
     
         10 . A wireless device comprising:
 a transceiver configured to provide to generate a radio-frequency signal;   a power amplifier module configured receive an input signal based at least in part on the radio-frequency signal at an amplifier input node, the power amplifier module including a first radio-frequency signal node, a second radio-frequency signal node, a first power cell path coupled between the first radio-frequency signal node and a ground reference node and including a first transistor having an input terminal coupled to the second radio-frequency signal node, and a second power cell path coupled in parallel with the first power cell path between the first radio-frequency signal node and the ground reference node and including a second transistor having an input terminal coupled to the second radio-frequency signal node and an output terminal that is electrically isolated from an output terminal of the first transistor, the power amplifier module being configured to amplify the input signal using at least the first transistor and the second transistor and provide an amplified output signal on an amplifier output node; and   an antenna configured to receive and wirelessly transmit the amplified output signal.   
     
     
         11 . The wireless device of  claim 10  further comprising diplexer circuitry configured to filter the amplified output signal prior to transmission of the amplified output signal by the antenna. 
     
     
         12 . The wireless device of  claim 11  further comprising an antenna switch module coupled between the antenna and the diplexer circuitry. 
     
     
         13 . The wireless device of  claim 10  wherein the first power cell path includes a third transistor having a first terminal coupled to the output terminal of the first transistor and a second terminal coupled to the second radio-frequency signal node, and the second power cell path includes a fourth transistor having a first terminal coupled to the output terminal of the second transistor and a second terminal coupled to the second radio-frequency signal node. 
     
     
         14 . The wireless device of  claim 13  wherein the third transistor and the fourth transistor isolate the output terminal of the second transistor from the output terminal of the first transistor. 
     
     
         15 . The wireless device of  claim 13  wherein an input terminal of the third transistor and an input terminal of the fourth transistor are coupled to a grounded direct-current blocking capacitor. 
     
     
         16 . Electronic circuitry comprising:
 a first radio-frequency signal node;   a second radio-frequency signal node;   a first power cell path coupled between the first radio-frequency signal node and a ground reference node, the first power cell path including a first transistor having an input terminal coupled to the second radio-frequency signal node; and   a second power cell path coupled in parallel with the first power cell path between the first radio-frequency signal node and the ground reference node, the second power cell path including a second transistor having an input terminal coupled to the second radio-frequency signal node and an output terminal that is electrically isolated from an output terminal of the first transistor.   
     
     
         17 . The electronic circuitry of  claim 16 , wherein the first power cell path and the second power cell path are implemented at least in part in one or more conductive layers of a semiconductor die. 
     
     
         18 . The electronic circuitry of  claim 16  wherein the first power cell path includes a third transistor having a first terminal coupled to the output terminal of the first transistor and a second terminal coupled to the second radio-frequency signal node. 
     
     
         19 . The electronic circuitry of  claim 18  wherein the second power cell path includes a fourth transistor having a first terminal coupled to the output terminal of the second transistor and a second terminal coupled to the second radio-frequency signal node. 
     
     
         20 . The electronic circuitry of  claim 19  wherein the third transistor and the fourth transistor isolate the output terminal of the second transistor from the output terminal of the first transistor.