Isolation for carrier aggregation circuit

Abstract

Improved isolation for carrier aggregation circuit. In some embodiments, a carrier aggregation circuit can include a common input node and a common output node, and a multiplexer configured to support first and second bands. The carrier aggregation circuit can further include a first path implemented between the common input node and the common output node, and be configured to support the first band, with the first path including a pre-multiplexer switch, the multiplexer, a first post-multiplexer switch, and a first enable switch. The carrier aggregation circuit can further include a second path implemented between the common input node and the common output node, and be configured to support the second band, with the second path including the pre-multiplexer switch, the multiplexer, a second post-multiplexer switch, and a second enable switch different than the first enable switch.

1 . A carrier aggregation circuit comprising:
 a common input node and a common output node;   a multiplexer configured to support first and second bands;   a first path implemented between the common input node and the common output node, and configured to support the first band, the first path including a pre-multiplexer switch, the multiplexer, a first post-multiplexer switch, and a first enable switch; and   a second path implemented between the common input node and the common output node, and configured to support the second band, the second path including the pre-multiplexer switch, the multiplexer, a second post-multiplexer switch, and a second enable switch different than the first enable switch.   
     
     
         2 . The carrier aggregation circuit of  claim 1  wherein the common input node is an antenna node and the multiplexer is configured to support a plurality of receive bands. 
     
     
         3 . The carrier aggregation circuit of  claim 2  wherein the common output node is configured to be coupled to an input of a low-noise amplifier. 
     
     
         4 . The carrier aggregation circuit of  claim 1  wherein the multiplexer is configured as a diplexer. 
     
     
         5 . The carrier aggregation circuit of  claim 1  wherein the first and second paths are configured to support a carrier aggregation operation involving the first and second bands when in a carrier aggregation mode. 
     
     
         6 . The carrier aggregation circuit of  claim 5  wherein each of the first and second paths is enabled to couple the common input node to the common output node. 
     
     
         7 . The carrier aggregation circuit of  claim 6  wherein the first path is configured such that each of the pre-multiplexer switch, the first post-multiplexer switch and the first enable switch is closed, and the second path is configured such that each of the pre-multiplexer switch, the second post-multiplexer switch and the second enable switch is closed. 
     
     
         8 . The carrier aggregation circuit of  claim 1  wherein the first and second paths are configured to support a non-carrier aggregation operation involving either of the first and second bands when in a non-carrier aggregation mode. 
     
     
         9 . The carrier aggregation circuit of  claim 8  wherein one of the first and second paths is enabled to couple the common input node to the common output node, and the other of the first and second paths is disabled to isolate the common output node from the common input node. 
     
     
         10 . The carrier aggregation circuit of  claim 9  wherein the first path is enabled such that each of the pre-multiplexer switch, the first post-multiplexer switch and the first enable switch is closed, and the second path is disabled such that the pre-multiplexer switch is closed and each of the second post-multiplexer switch and the second enable switch is open to provide the isolation of the common output node from the common input node. 
     
     
         11 . The carrier aggregation circuit of  claim 9  wherein the second path is enabled such that each of the pre-multiplexer switch, the second post-multiplexer switch and the second enable switch is closed, and the first path is disabled such that the pre-multiplexer switch is closed and each of the first post-multiplexer switch and the first enable switch is open to provide the isolation of the common output node from the common input node. 
     
     
         12 . The carrier aggregation circuit of  claim 9  wherein the isolation of the common output node from the common input node for the disabled one of the first and second paths is achieved by more than one switch being open along the disabled path. 
     
     
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         25 . A radio-frequency module comprising:
 a packaging substrate configured to receive and support a plurality of components; and   a carrier aggregation circuit implemented relative to the packaging substrate, and including a common input node and a common output node, and a multiplexer configured to support first and second bands, the carrier aggregation circuit further including a first path implemented between the common input node and the common output node, and configured to support the first band, the first path including a pre-multiplexer switch, the multiplexer, a first post-multiplexer switch, and a first enable switch, the carrier aggregation circuit further including a second path implemented between the common input node and the common output node, and configured to support the second band, the second path including the pre-multiplexer switch, the multiplexer, a second post-multiplexer switch, and a second enable switch different than the first enable switch.   
     
     
         26 . The radio-frequency module of  claim 25  wherein the common input node is an antenna node and the multiplexer is configured to support a plurality of receive bands. 
     
     
         27 . The radio-frequency module of  claim 26  wherein the antenna node is configured to be coupled to a diversity antenna. 
     
     
         28 . The radio-frequency module of  claim 26  further comprising a low-noise amplifier having an input coupled to the common output node of the carrier aggregation circuit. 
     
     
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         34 . A carrier aggregation circuit comprising:
 a common input node and a common output node;   a first filter configured to support a first band, and a second filter configured to support a second band;   a first path implemented between the common input node and the common output node, and configured to support the first band, the first path including the first filter, a first post-filter switch, and a first enable switch; and   a second path implemented between the common input node and the common output node, and configured to support the second band, the second path including the second filter, a second post-filter switch, and a second enable switch different than the first enable switch.   
     
     
         35 . The carrier aggregation circuit of  claim 34  wherein the first filter and the second filter are implemented as a multiplexer. 
     
     
         36 . The carrier aggregation circuit of  claim 35  wherein the multiplexer is configured as a diplexer. 
     
     
         37 . The carrier aggregation circuit of  claim 35  wherein each of the first and second paths further includes a pre-multiplexer switch implemented between the common input node and the multiplexer, such that the pre-multiplexer switch is shared by the first and second paths. 
     
     
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