Current detection circuit and dcdc converter including the same

Abstract

According to an embodiment, a current detection circuit includes a transistor, an operational amplifier, and a transistor. In the transistor, the source and the gate are coupled to the source and the gate of a transistor which is provided on a high side of a drive circuit. The operational amplifier amplifies a potential difference between a drain voltage of the transistor and a drain voltage of the transistor. The transistor is provided over a current path through which a current flowing to the transistor flows, and which has the gate to which an output voltage of the operational amplifier is supplied. A value of the current flowing through the transistor is detected based on a value of the current flowing through the transistor.

What is claimed is: 
     
         1 . A DCDC converter comprising:
 a drive circuit;   a current detection circuit configured to detect a value of a current flowing through a first drive transistor;   a first comparator configured to compare a detection result of the current detection circuit and a reference voltage; and   a pulse signal generation unit configured to generate a pulse signal of a duty ratio in accordance with a comparison result of the first comparator,   wherein the drive circuit has
 a second drive transistor provided on a low side, and being controlled to be turned ON/OFF based on a dead time existing therebetween complementarily with the first drive transistor in accordance with a pulse signal, and 
 an inductor provided between the first and second drive transistors and the external output terminal. 
   
     
     
         2 . A DCDC converter comprising:
 a drive circuit;   a current detection circuit configured to a value of a current flowing through an inductor;   an error amplifier which amplifies a difference between a detection result of the current detection circuit and a reference voltage; and   a pulse signal generation circuit which generates first and second pulse signals of a duty ratio in accordance with an output result of the error amplifier,   wherein the drive circuit has
 the inductor, 
 a first drive transistor configured to control a current flowing from an external input terminal to an external output terminal through the inductor, by being controlled to be turned ON/OFF based on a first pulse signal, during voltage step down, 
 a second drive transistor configured to control a current flowing from a ground voltage terminal to the external output terminal through the inductor, by being controlled to be turned ON/OFF based on a dead time existing therebetween complementarily with the first drive transistor, during the voltage step down, 
 a third drive transistor configured to control a current flowing from the external input terminal to the ground voltage terminal through the inductor, by being controlled to be turned ON/OFF based on a second pulse signal, during voltage step up, and 
 a fourth drive transistor configured to control a current flowing from the external input terminal to the external output terminal through the inductor, by being controlled to be turned ON/OFF based on a dead time existing therebetween complementarily with the third drive transistor, during voltage step up.