Radiated spurious emissions and linearity for antenna tuning at high voltage through bias/impedance control

Abstract

A radio-frequency module includes a first transistor disposed between a first node and a second node, the first transistor having a source, a drain, a gate, and a body, a coupling path connected between the body of the first transistor and one or more of the gate, the source, and the drain of the first transistor, the coupling path including a diode, and an adjustable impedance network connected between the body of the first transistor and a ground reference, the adjustable impedance network being configured to reduce radio-frequency distortion in the first transistor.

What is claimed is: 
     
         1 . A radio-frequency module comprising:
 a first transistor disposed between a first node and a second node, the first transistor having a source, a drain, a gate, and a body;   a coupling path connected between the body of the first transistor and one or more of the gate, the source, and the drain of the first transistor, the coupling path including a diode; and   adjustable impedance circuitry connected between the body of the first transistor and a ground reference, the adjustable impedance circuitry being configured to reduce radio-frequency distortion in the first transistor.   
     
     
         2 . The radio-frequency module of  claim 1  wherein the adjustable impedance circuitry is configured to present a first impedance when the first transistor is transmitting a signal having a first frequency and present a second impedance when the first transistor is transmitting a signal having a second frequency higher than the first frequency. 
     
     
         3 . The radio-frequency module of  claim 1  wherein the first transistor is a silicon-on-insulator transistor. 
     
     
         4 . The radio-frequency module of  claim 1  wherein the adjustable impedance circuitry includes a second transistor having a gate, a drain, and a source. 
     
     
         5 . The radio-frequency module of  claim 4  wherein the second transistor is connected at one of the drain or source of the second transistor to the body of the first transistor and connected at the other of the drain or the source of the second transistor to the ground reference. 
     
     
         6 . Radio-frequency circuitry comprising:
 a first transistor disposed between a first node and a second node, the first transistor having a source, a drain, a gate, and a body;   a coupling path connected between the body of the first transistor and the gate of the first transistor, the coupling path including a diode; and   adjustable impedance circuitry connected between the body of the first transistor and a ground reference, the adjustable impedance circuitry being configured to reduce radio-frequency distortion in the first transistor.   
     
     
         7 . The radio-frequency circuitry of  claim 6  wherein the adjustable impedance circuitry is configured to present a first impedance when the first transistor is transmitting a signal having a first frequency and present a second impedance when the first transistor is transmitting a signal having a second frequency higher than the first frequency. 
     
     
         8 . The radio-frequency circuitry of  claim 6  wherein the first transistor is a silicon-on-insulator transistor. 
     
     
         9 . The radio-frequency circuitry of  claim 6  wherein the adjustable impedance circuitry includes a second transistor having a gate, a drain, and a source. 
     
     
         10 . The radio-frequency circuitry of  claim 9  wherein the second transistor is connected at one of the drain or source of the second transistor to the body of the first transistor and connected at the other of the drain or the source of the second transistor to the ground reference. 
     
     
         11 . The radio-frequency circuitry of  claim 9  wherein the second transistor is operable to provide a desired impedance for reducing undesired radio-frequency distortion in the first transistor at a frequency of operation. 
     
     
         12 . The radio-frequency circuitry of  claim 9  wherein the adjustable impedance circuitry includes one or more resistors connected in series with the second transistor. 
     
     
         13 . The radio-frequency circuitry of  claim 9  wherein the adjustable impedance circuitry includes one or more capacitors connected in series with the second transistor. 
     
     
         14 . The radio-frequency circuitry of  claim 6  wherein the adjustable impedance circuitry includes a capacitor. 
     
     
         15 . The radio-frequency circuitry of  claim 14  wherein the capacitor is connected at a first end to the body of the first transistor and at a second end to the ground reference. 
     
     
         16 . The radio-frequency circuitry of  claim 6  wherein the adjustable impedance circuitry includes a capacitor connected in series with an inductor. 
     
     
         17 . The radio-frequency circuitry of  claim 6  wherein the adjustable impedance circuitry includes a plurality of capacitors configured to be selectively coupled to the body of the first transistor using a network of switches. 
     
     
         18 . A wireless device comprising:
 a circuit board configured to receive a plurality of packaged modules; and   a radio-frequency module mounted on the circuit board, the radio-frequency module including a packaging substrate configured to receive one or more components, the packaging substrate having a semiconductor die mounted thereon, the semiconductor die including a first transistor having a gate, a drain, a source, and a body, a coupling path connected between the body of the first transistor and one of the source, the drain, and the gate of the first transistor, the coupling path including a diode, and an impedance control circuit connected between the body of the first transistor and a ground reference, the impedance control circuit being configured to reduce radio-frequency distortion in the first transistor.   
     
     
         19 . The wireless device of  claim 18  wherein the impedance control circuit includes a second transistor having a gate, a drain, and a source. 
     
     
         20 . The wireless device of  claim 19  wherein the second transistor is connected at one of the drain or source of the second transistor to the body of the first transistor.