US2019252520A1PendingUtilityA1

Long channels for transistors

Assignee: IBMPriority: Dec 18, 2017Filed: Apr 23, 2019Published: Aug 15, 2019
Est. expiryDec 18, 2037(~11.4 yrs left)· nominal 20-yr term from priority
H10P 50/642B82Y 10/00H01L 29/66598H01L 29/1037H01L 29/6656H01L 29/66545H01L 29/42392H01L 21/823431H01L 21/30604H01L 29/66666H01L 29/66795H10D 84/0158H10D 84/85H10D 84/038H10D 64/021H10D 64/017H10D 62/292H10D 62/118H10D 30/6757H10D 30/6735H10D 30/6713H10D 30/0323H10D 30/031H10D 30/025H10D 30/024H10D 30/014H10D 30/43H10D 62/151H10D 62/121H10D 84/83H10D 84/0128H10D 30/0229
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Claims

Abstract

A semiconductor device includes a first nanosheet stack, a second nanosheet stack, and a third nanosheet stack arranged on a substrate. The semiconductor device includes a gate arranged on the first nanosheet stack, the second nanosheet stack, and the third nanosheet stack. The semiconductor device includes a channel extending through the gate and from the first nanosheet stack, the second nanosheet stack, and to the third nanosheet stack in a serpentine fashion. The semiconductor device includes a first source/drain and a second source/drain arranged on opposing sides of the gate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first nanosheet stack, a second nanosheet stack, and a third nanosheet stack arranged on a substrate;   a gate arranged on the first nanosheet stack, the second nanosheet stack, and the third nanosheet stack;   a channel extending through the gate and from the first nanosheet stack, the second nanosheet stack, and to the third nanosheet stack in a serpentine fashion; and   a first source/drain and a second source/drain arranged on opposing sides of the gate.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the channel extends through the gate in three areas. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the first nanosheet stack and the second nanosheet stack are coupled on one side of the gate. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the second nanosheet stack and the third nanosheet stack are coupled on another side of the gate. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the first nanosheet stack and the second nanosheet stack are coupled by overlapping epitaxial growth. 
     
     
         6 . The semiconductor device of  claim 5 , wherein the second nanosheet stack and the third nanosheet stack are coupled by overlapping epitaxial growth. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the first nanosheet stack and the second nanosheet stack are coupled by a metal-filled trench. 
     
     
         8 . The semiconductor device of  claim 7 , wherein the second nanosheet stack and the third nanosheet stack are coupled by a metal-filled trench. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the first nanosheet stack, the second nanosheet stack, and the third nanosheet stack each comprise an epitaxial growth. 
     
     
         10 . A semiconductor device, comprising:
 a first nanosheet stack, a second nanosheet stack, and a third nanosheet stack arranged on a substrate;   a gate arranged on the first nanosheet stack, the second nanosheet stack, and the third nanosheet stack;   a channel extending through the gate and from the first nanosheet stack, the second nanosheet stack, and to the third nanosheet stack in a serpentine fashion, the channel comprising a length greater than  100  nanometers (nm); and   a first source/drain and a second source/drain arranged on opposing sides of the gate.   
     
     
         11 . The semiconductor device of  claim 10 , wherein the channel extends through the gate in three areas. 
     
     
         12 . The semiconductor device of  claim 10 , wherein the first nanosheet stack and the second nanosheet stack are coupled on one side of the gate. 
     
     
         13 . The semiconductor device of  claim 12 , wherein the second nanosheet stack and the third nanosheet stack are coupled on another side of the gate. 
     
     
         14 . The semiconductor device of  claim 12 , wherein the first nanosheet stack and the second nanosheet stack are coupled by overlapping epitaxial growth. 
     
     
         15 . The semiconductor device of  claim 14 , wherein the second nanosheet stack and the third nanosheet stack are coupled by overlapping epitaxial growth. 
     
     
         16 . The semiconductor device of  claim 10 , wherein the first nanosheet stack and the second nanosheet stack are coupled by a metal-filled trench. 
     
     
         17 . The semiconductor device of  claim 16 , wherein the second nanosheet stack and the third nanosheet stack are coupled by a metal-filled trench. 
     
     
         18 . The semiconductor device of  claim 10 , wherein the first nanosheet stack, the second nanosheet stack, and the third nanosheet stack each comprise an epitaxial growth. 
     
     
         19 . A semiconductor device, comprising:
 a first nanosheet stack, a second nanosheet stack, and a third nanosheet stack arranged on a substrate; and   a channel extending through the gate and from the first nanosheet stack, the second nanosheet stack, and to the third nanosheet stack in a serpentine fashion.   
     
     
         20 . The semiconductor device of  claim 19 , wherein the channel extends through the gate in three areas.

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