US2019252347A1PendingUtilityA1

Trace Design for Bump-on-Trace (BOT) Assembly

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Dec 30, 2013Filed: Apr 22, 2019Published: Aug 15, 2019
Est. expiryDec 30, 2033(~7.4 yrs left)· nominal 20-yr term from priority
H10W 72/07236H10W 72/072H10W 72/07221H10W 90/724H10W 72/244H10W 72/07254H10W 72/221H10W 72/07252H10W 72/253H10W 72/225H10W 72/252H10W 72/242H10W 72/232H10W 72/287H05K 3/3436H10W 90/701H05K 2203/1173H05K 2201/10674H10W 80/732H10W 72/932H10W 72/931H10W 72/923H10W 72/29H10W 72/012H01L 2224/13023H01L 2224/81815H01L 2224/131Y02P70/613H01L 24/05H01L 2224/16012H01L 24/16H01L 23/49811H01L 24/11H01L 2224/81385H01L 2224/13294H01L 24/81H01L 2924/3841H01L 2924/381H01L 2224/133H01L 2924/14H01L 2224/10175H01L 2924/12042H01L 2224/13014H01L 2224/8112H01L 2224/16113H01L 2224/13147H01L 24/13H01L 2224/16238H01L 2224/16013H01L 2224/81447H01L 2224/13013H01L 2224/16227Y02P70/50
57
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Claims

Abstract

A bump-on-trace (BOT) interconnection in a package and methods of making the BOT interconnection are provided. An embodiment BOT interconnection comprises a landing trace including a distal end, a conductive pillar extending at least to the distal end of the landing trace; and a solder feature electrically coupling the landing trace and the conductive pillar. In an embodiment, the conductive pillar overhangs the end surface of the landing trace. In another embodiment, the landing trace includes one or more recesses for trapping the solder feature after reflow. Therefore, a wetting area available to the solder feature is increased while permitting the bump pitch of the package to remain small.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A structure comprising:
 a substrate; and   a landing trace on the substrate, the landing trace having a first side and a second side opposite to the first side, the landing trace having a plurality of indents extending into the first side in a plan view, the second side being free of indents in the plan view.   
     
     
         2 . The structure of  claim 1 , further comprising a solder feature over the landing trace, the solder feature extending into the plurality of indents. 
     
     
         3 . The structure of  claim 2 , wherein solder feature is in physical contact with the plurality of indents. 
     
     
         4 . The structure of  claim 2 , further comprising a conductive pillar over the solder feature, the conductive pillar overlapping with the plurality of indents in the plan view. 
     
     
         5 . The structure of  claim 4 , wherein a width of the solder feature is greater than a width of the conductive pillar. 
     
     
         6 . The structure of  claim 4 , wherein a width of the landing trace is less than a width of the conductive pillar. 
     
     
         7 . The structure of  claim 1 , wherein the plurality of indents have a comb pattern in the plan view. 
     
     
         8 . A structure comprising:
 a substrate; and   a landing trace on the substrate, the landing trace having a first sidewall and a second sidewall opposite to the first sidewall, the first sidewall having a plurality of indents in a plan view, an entirety of the second sidewall being a planar sidewall.   
     
     
         9 . The structure of  claim 8 , further comprising a solder feature over the landing trace, the solder feature filling the plurality of indents. 
     
     
         10 . The structure of  claim 9 , wherein a width of the solder feature is greater than a width of the landing trace. 
     
     
         11 . The structure of  claim 9 , wherein the solder feature is in physical contact with the second sidewall of the landing trace. 
     
     
         12 . The structure of  claim 9 , further comprising a conductive pillar over the solder feature, the conductive pillar overlapping with the plurality of indents in the plan view. 
     
     
         13 . The structure of  claim 12 , wherein a width of the solder feature is greater than a width of the conductive pillar. 
     
     
         14 . The structure of  claim 8 , wherein the plurality of indents have a comb pattern in the plan view. 
     
     
         15 . A structure comprising:
 a substrate; and   a landing trace on the substrate, the landing trace comprising:
 a first portion; 
 a second portion; and 
 a third portion connecting the first portion to the second portion in a plan view, a first sidewall of the first portion being collinear with a first sidewall of the second portion in the plan view, a second sidewall of the first portion being collinear with a second sidewall of the second portion and a second sidewall of the third portion in the plan view, the first sidewall of the third portion having a plurality of indents in the plan view, an entirety of the second sidewall of the third portion being a planar sidewall. 
   
     
     
         16 . The structure of  claim 15 , wherein the plurality of indents have a comb pattern in the plan view. 
     
     
         17 . The structure of  claim 15 , further comprising a solder feature over the third portion of the landing trace, the solder feature overlapping with the plurality of indents in the plan view. 
     
     
         18 . The structure of  claim 17 , wherein the solder feature is in physical contact with the plurality of indents. 
     
     
         19 . The structure of  claim 17 , further comprising a conductive pillar over the solder feature, the conductive pillar overlapping with the plurality of indents in the plan view. 
     
     
         20 . The structure of  claim 19 , wherein the conductive pillar is in physical contact with the solder feature.

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