US2019252285A1PendingUtilityA1

Semiconductor device packages using a thermally enhanced conductive molding compound

Assignee: NXP USA INCPriority: Oct 31, 2013Filed: Apr 24, 2019Published: Aug 15, 2019
Est. expiryOct 31, 2033(~7.3 yrs left)· nominal 20-yr term from priority
H10W 74/00H10W 72/884H10W 90/754H10W 90/734H10W 74/117H10W 74/016H10W 40/778H10W 40/251H10W 40/10H01L 23/3128H01L 23/3737H01L 23/36H01L 21/565H01L 23/4334
47
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Claims

Abstract

A heat transportation mechanism that is thermally conductive, but not electrically conductive, is provided so as to permit transportation of heat generated by a semiconductor device die to the exterior of a semiconductor device package. Embodiments can use a thermally conductive polymer structure, added to the package mold compound, to transport heat through the mold compound. The thermally conductive polymer structure can be fixed to the semiconductor device die prior to molding or can be included in an overmolding compound slug prior to performing the overmolding process. Flexibility of placement of the thermally conductive polymer structure is provided by using dielectric compounds.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 - 10 . (canceled) 
     
     
         11 . A packaged device assembly comprising:
 a semiconductor device die;   a thermally conductive structure comprising thermally-conductive dielectric polymers and having a first end affixed to a major surface of the semiconductor device die and a second end opposite the first end; and   encapsulant over and around the semiconductor device die and around the thermally conductive structure and forming an encapsulated region of the packaged device assembly, wherein
 the second end of the thermally conductive structure is exposed at a major surface of the encapsulated region of the packaged device assembly. 
   
     
     
         12 . The packaged device assembly of  claim 11  further comprising:
 a heat sink affixed to the major surface of the encapsulated region of the packaged device assembly, wherein
 the heat sink is thermally coupled to the second end of the thermally conductive structure, and 
 the heat sink is configured to dissipate heat transported from the semiconductor device die through the thermally conductive structure. 
 
 
     
     
         13 . The packaged device assembly of  claim 11  wherein the thermally conductive structure is configured to provide a directional thermal conduction path from the semiconductor device die to the major surface of the packaged device assembly. 
     
     
         14 . The packaged device assembly of  claim 13  wherein the thermally conductive structure comprises thermally conductive dielectric polymers in one or more of a strain, nanofiber, or plane formation. 
     
     
         15 . The packaged device assembly of  claim 11  wherein the semiconductor device die comprises a power device die. 
     
     
         16 . The packaged device assembly of  claim 11  wherein the thermally conductive structure further comprises:
 a plurality of cylinders comprising the thermally conductive dielectric polymers; and 
 a holder orienting each of the plurality of cylinders in an axially parallel configuration. 
 
     
     
         17 . The packaged device assembly of  claim 11  wherein the thermally conductive structure further comprises:
 a first plane of the thermally conductive dielectric polymer material, wherein the first end comprises an edge of the first plane and the second end comprises an opposing edge of the first plane. 
 
     
     
         18 . The packaged device assembly of  claim 17  wherein the thermally conductive structure further comprises:
 a second plane of the thermally conducive dielectric polymer material, wherein the second plane and the first plane form a three-dimensional structure, and the first end further comprises an edge of the second plane and the second end further comprises an opposing edge of the second plane. 
 
     
     
         19 . The packaged device assembly of  claim 11  wherein the packaged device assembly is a flip chip package. 
     
     
         20 . The packaged device assembly of  claim 11  wherein the packaged device assembly is a QFN package.

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