Method for forming semiconductor structure

Abstract

The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.

1 . A method for forming a semiconductor structure, comprising:
 providing a substrate, a first region and a second region are defined thereon;   forming a gate dielectric layer and a work function metal layer sequentially on the substrate within the first region and within the second region;   performing a hydrogen gas treatment on the substrate; and   forming a dielectric layer on the work function metal layer within the second region;   removing the work function metal layer within the first region.   
     
     
         2 . The method of  claim 1 , wherein the hydrogen gas treatment is performed before the dielectric layer is formed. 
     
     
         3 . The method of  claim 1 , wherein the hydrogen gas treatment is performed after the dielectric layer is formed. 
     
     
         4 . The method of  claim 1 , wherein the hydrogen gas treatment is performed with a nitrogen gas treatment simultaneously. 
     
     
         5 . The method of  claim 1 , wherein a temperature in the hydrogen gas treatment is between 25° C.-500° C. 
     
     
         6 . The method of  claim 1 , wherein the step for removing the work function metal layer within the first region does not remove the work function metal layer within the second region. 
     
     
         7 . The method of  claim 1 , further comprising forming at least two trenches within the first region and within the second region respectively, wherein the gate dielectric layer and the work function metal layer are disposed in the trenches. 
     
     
         8 . The method of  claim 1 , wherein when the hydrogen gas treatment is performed, the work function metal layer still covers on the gate dielectric layer. 
     
     
         9 . The method of  claim 1 , wherein the gate dielectric layer comprises hafnium oxide (HfO 2 ), hafnium silicon oxide (HfSiO 4 ), hafnium silicon oxynitride (HfSiON), aluminum oxide (Al 2 O 3 ), lanthanum oxide (La 2 O 3 ), tantalum oxide (Ta 2 O 5 ), yttrium oxide (Y 2 O 3 ), zirconium oxide (ZrO 2 ), strontium titanate oxide (SrTiO 3 ), zirconium silicon oxide (ZrSiO 4 ), hafnium zirconium oxide (HfZrO 4 ), strontium bismuth tantalate (SrBi 2 Ta2O 9 , SBT), lead zirconate titanate (PbZrxTi 1 -xO 3 , PZT), barium strontium titanate (BaxSr 1 -xTiO 3 , BST) and a combination thereof. 
     
     
         10 . The method of  claim 1 , wherein the work function metal layer comprises titanium nitride (TiN) and tantalum nitride (TaN). 
     
     
         11 . A method for forming a semiconductor structure, comprising:
 providing a substrate having a first region and a second region defined thereon;   forming a gate dielectric layer on the substrate within the first region and within the second region;   forming a first metal layer on the gate dielectric layer within the first region and within the second region;   forming a second metal layer on the gate dielectric layer within the first region and within the second region;   performing a hydrogen gas treatment on the substrate;   forming a dielectric layer on the second metal layer within the second region; and   removing the second metal layer within the first region.   
     
     
         12 . The method of  claim 11 , further comprising removing the dielectric layer from the substrate after the step of removing the second metal layer within the first region. 
     
     
         13 . The method of  claim 12 , further comprising forming a third metal layer within the first region and within the second region. 
     
     
         14 . The method of  claim 12 , further comprising forming a filling metal layer within the first region and within the second region. 
     
     
         15 . The method of  claim 14 , further comprising performing a chemical mechanical polishing (CMP) process on the filling metal layer. 
     
     
         16 . The method of  claim 11 , wherein the hydrogen gas treatment is performed after the step of forming a first metal layer on the gate dielectric layer. 
     
     
         17 . The method of  claim 11 , wherein the hydrogen gas treatment is performed before the dielectric layer is formed. 
     
     
         18 . The method of  claim 11 , wherein the hydrogen gas treatment is performed after the dielectric layer is formed. 
     
     
         19 . The method of  claim 11 , wherein the hydrogen gas treatment is performed after removing the second metal layer within the first region. 
     
     
         20 . The method of  claim 11 , wherein the first metal layer is a bottom barrier metal layer and the second metal layer is a work function metal layer, and the first metal layer still covers on the gate dielectric layer after removing the second metal layer within the first region.